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Etched is deploying two new technologies in chip design: low-voltage inference and cluster-scale memory. CEO Gavin Uberti says they'll make their chips much more power-efficient and way, way faster than today's leading GPUs. He breaks it down: "We looked at a lot of early research directions, and we realized...

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TBPN

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20,404 次观看 • 10 天前 •via X (Twitter)

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If we get AGI before 2030 but can only produce ~200 GW a year of chips on advanced process nodes, can we ease the bottleneck by going back to older nodes? Some of the most singularity-pilled investors think so. Most of the FLOPS improvement between chip generations has come from numerics - not transistor density. But you could just design a new version of a 7nm chip like the A100 to have FP4. Holding numerics and die area constant, a B200 (2025 chip on 4nm) would only have ~3.5x more FLOPS than an A100 (2020 chip on 7nm). That seems like a manageable haircut - does it mean we can blow past the 200 GW ceiling? Dylan Patel explains why this is not an apples-to-apples comparison. If you run real-world performance analysis on DeepSeek V3 or Kimi K2.5, the performance gap between Hopper and Blackwell isn't 3x. It's ~20x. Why? Because inference is already memory-bandwidth-bound, and older chips have far fewer FLOPS per die, requiring even more communication between chips. Remember the bandwidth hierarchy: on-chip SRAM runs at tens of TB/s, HBM at single-digit TB/s, NVLink within a 72-GPU domain at high hundreds of GB/s, and between racks at low hundreds of GB/s. Each boundary is roughly a 10x drop. With less compute per chip, you need more chips to run the same model - which means more communication across those slower pipes that are already bottlenecking you.
3:31

If we get AGI before 2030 but can only produce ~200 GW a year of chips on advanced process nodes, can we ease the bottleneck by going back to older nodes? Some of the most singularity-pilled investors think so. Most of the FLOPS improvement between chip generations has come from numerics - not transistor density. But you could just design a new version of a 7nm chip like the A100 to have FP4. Holding numerics and die area constant, a B200 (2025 chip on 4nm) would only have ~3.5x more FLOPS than an A100 (2020 chip on 7nm). That seems like a manageable haircut - does it mean we can blow past the 200 GW ceiling? Dylan Patel explains why this is not an apples-to-apples comparison. If you run real-world performance analysis on DeepSeek V3 or Kimi K2.5, the performance gap between Hopper and Blackwell isn't 3x. It's ~20x. Why? Because inference is already memory-bandwidth-bound, and older chips have far fewer FLOPS per die, requiring even more communication between chips. Remember the bandwidth hierarchy: on-chip SRAM runs at tens of TB/s, HBM at single-digit TB/s, NVLink within a 72-GPU domain at high hundreds of GB/s, and between racks at low hundreds of GB/s. Each boundary is roughly a 10x drop. With less compute per chip, you need more chips to run the same model - which means more communication across those slower pipes that are already bottlenecking you.

Dwarkesh Patel

56,362 次观看 • 3 个月前

ELON MUSK: We believe the AI5 chip will be roughly comparable performance to an NVIDIA Blackwell, and at much less than 10% of the cost Transcription: I'm super hardcore on chips right now as you may be able to tell. I have chips on the brain. I dream about chips, Literally! Because in order to have a functional robot, you have to have a great AI chip. And it needs to be an inexpensive chip and it needs to be very power efficient So we think we believe the AI5 chip will be probably about a third of the power of say something like a Blackwell, an NVIDIA Blackwell, which is a great chip, for roughly comparable performance. And much less than 10% of the cost. This is a chip that is very much optimized for the Tesla AI software stack. So it's not meant to be a general purpose chip, it's meant to be an amazing chip for the Tesla AI software And I mean a couple of things that I think make... like how is Tesla able to achieve such an improvement? I think it is because we are specialized. We're not trying to... you know, NVIDIA has to serve the superset of all past and future customers. So all of their requirements, all of the software that they've written has to work, which is a very difficult problem. Whereas we just need to make it work for our software. And so we're able to simplify the chip dramatically And then we also, I think we're unique in this, but like we have an integer-based system. And integer operations are fundamentally more efficient than floating point operations. So we can do floating point, but the vast majority of our inference is done in integer. Which is, if you're familiar with sort of logic gates, the simplicity of integer... it's integer is much more power efficient, much more silicon efficient, but you have to, you actually have to train for integer inference, which everyone else is training for floating point. That's kind of like a niche technical detail, but it's actually very important. So, yeah, this is going to be a great chip So this chip will be made in basically in four places: TSMC Taiwan, Samsung Korea, TSMC Arizona, and TSMC Texas. And we already know what improvements to make for AI6. So I'm hopeful that we can within less than a year of AI5 starting production, we can actually transition in the same fab to AI6 and double all of the performance metrics
3:12

ELON MUSK: We believe the AI5 chip will be roughly comparable performance to an NVIDIA Blackwell, and at much less than 10% of the cost Transcription: I'm super hardcore on chips right now as you may be able to tell. I have chips on the brain. I dream about chips, Literally! Because in order to have a functional robot, you have to have a great AI chip. And it needs to be an inexpensive chip and it needs to be very power efficient So we think we believe the AI5 chip will be probably about a third of the power of say something like a Blackwell, an NVIDIA Blackwell, which is a great chip, for roughly comparable performance. And much less than 10% of the cost. This is a chip that is very much optimized for the Tesla AI software stack. So it's not meant to be a general purpose chip, it's meant to be an amazing chip for the Tesla AI software And I mean a couple of things that I think make... like how is Tesla able to achieve such an improvement? I think it is because we are specialized. We're not trying to... you know, NVIDIA has to serve the superset of all past and future customers. So all of their requirements, all of the software that they've written has to work, which is a very difficult problem. Whereas we just need to make it work for our software. And so we're able to simplify the chip dramatically And then we also, I think we're unique in this, but like we have an integer-based system. And integer operations are fundamentally more efficient than floating point operations. So we can do floating point, but the vast majority of our inference is done in integer. Which is, if you're familiar with sort of logic gates, the simplicity of integer... it's integer is much more power efficient, much more silicon efficient, but you have to, you actually have to train for integer inference, which everyone else is training for floating point. That's kind of like a niche technical detail, but it's actually very important. So, yeah, this is going to be a great chip So this chip will be made in basically in four places: TSMC Taiwan, Samsung Korea, TSMC Arizona, and TSMC Texas. And we already know what improvements to make for AI6. So I'm hopeful that we can within less than a year of AI5 starting production, we can actually transition in the same fab to AI6 and double all of the performance metrics

X Freeze

305,109 次观看 • 8 个月前

Chamath: Two terms you need to pay attention to in AI are Prefill and Decode “There's two terms that I think you're going to hear a ton about over these next few years.” “The first term is prefill, and the next is decode.” “What prefill and decode are, are two very distinct ways of how models think, and how a model goes through the process of answering a question that you ask it.” “And so when you send a prompt to AI, what happens is that the model processes it. This is called the reading phase or prefill.” “It reads your entire prompt all at once. And then it does a bunch of math, calculates all these relationships between all the words, and it stores them in temporary memory.” “The problem is that this is really compute bound. So it requires massive brute force. And Nvidia GPUs crush here.” “And their architecture is designed for massive parallel processing, which makes them really amazing at digesting these long prompts.” “So the problem just gets bigger and bigger, Nvidia just completely dominates.” “But the next phase though, this critical phase, the decode phase, is the writing phase, right?” “So the model starts to generate a response, you ask it a question and its response, one token at a time.” “And then to pick the next token to pick the next word, it has to look back at everything it has said already so that it doesn't hallucinate.” “The problem is that this is incredibly memory bandwidth constrained.” “And in our architecture, a long time ago, we made these design decisions from day one.” “And so what we did was we took a very different architectural approach, we took a very conservative process technology. We weren't pushing the boundaries of physics.” “And we used a lot of what's called SRAM. So memory on the chip so that we could do this decode thing as well or better than everybody else.” “And so now when you put these two things together, I just think it's going to create a huge acceleration in the ability for this entire infrastructure layer to get much cheaper and much more valuable, which I suspect then it'll have a lot more developer pull, you'll get a lot more applications being built, billions and billions of more people using it.”
1:52

Chamath: Two terms you need to pay attention to in AI are Prefill and Decode “There's two terms that I think you're going to hear a ton about over these next few years.” “The first term is prefill, and the next is decode.” “What prefill and decode are, are two very distinct ways of how models think, and how a model goes through the process of answering a question that you ask it.” “And so when you send a prompt to AI, what happens is that the model processes it. This is called the reading phase or prefill.” “It reads your entire prompt all at once. And then it does a bunch of math, calculates all these relationships between all the words, and it stores them in temporary memory.” “The problem is that this is really compute bound. So it requires massive brute force. And Nvidia GPUs crush here.” “And their architecture is designed for massive parallel processing, which makes them really amazing at digesting these long prompts.” “So the problem just gets bigger and bigger, Nvidia just completely dominates.” “But the next phase though, this critical phase, the decode phase, is the writing phase, right?” “So the model starts to generate a response, you ask it a question and its response, one token at a time.” “And then to pick the next token to pick the next word, it has to look back at everything it has said already so that it doesn't hallucinate.” “The problem is that this is incredibly memory bandwidth constrained.” “And in our architecture, a long time ago, we made these design decisions from day one.” “And so what we did was we took a very different architectural approach, we took a very conservative process technology. We weren't pushing the boundaries of physics.” “And we used a lot of what's called SRAM. So memory on the chip so that we could do this decode thing as well or better than everybody else.” “And so now when you put these two things together, I just think it's going to create a huge acceleration in the ability for this entire infrastructure layer to get much cheaper and much more valuable, which I suspect then it'll have a lot more developer pull, you'll get a lot more applications being built, billions and billions of more people using it.”

The All-In Podcast

563,785 次观看 • 6 个月前

Groq's LPU is faster than GPUs, handling requests and responding more quickly. Groq's LPUs don't need speedy data delivery like Nvidia GPUs do because they don't have HBM in their system. They use SRAM, which is about 20 times faster than what GPUs use. Since inference runs use way less data than model training, Groq's LPU is more energy-efficient. It reads less from external memory and uses less power than a Nvidia GPU for inference tasks. The LPU works differently from GPUs. It uses a Temporal Instruction Set Computer architecture, so it doesn't have to reload data from memory as often as GPUs do with High Bandwidth Memory (HBM). This helps avoid issues with HBM shortages and keeps costs down. If Groq's LPU is used in places that do AI processing, you might not need special storage for Nvidia GPUs. The LPU doesn't demand super-fast storage like GPUs do. Groq is claiming that its technology could replace GPUs in AI tasks with its powerful chip and software.
7:57

Groq's LPU is faster than GPUs, handling requests and responding more quickly. Groq's LPUs don't need speedy data delivery like Nvidia GPUs do because they don't have HBM in their system. They use SRAM, which is about 20 times faster than what GPUs use. Since inference runs use way less data than model training, Groq's LPU is more energy-efficient. It reads less from external memory and uses less power than a Nvidia GPU for inference tasks. The LPU works differently from GPUs. It uses a Temporal Instruction Set Computer architecture, so it doesn't have to reload data from memory as often as GPUs do with High Bandwidth Memory (HBM). This helps avoid issues with HBM shortages and keeps costs down. If Groq's LPU is used in places that do AI processing, you might not need special storage for Nvidia GPUs. The LPU doesn't demand super-fast storage like GPUs do. Groq is claiming that its technology could replace GPUs in AI tasks with its powerful chip and software.

Brian Roemmele

87,128 次观看 • 2 年前

Micron is going to $4,000 and once you understand what inference actually is, the number stops sounding crazy (Save this). Dylan Patel just said that by 2030, OpenAI and Anthropic alone will need over 100 gigawatts of compute combined and by 2040, we may not even be measuring AI infrastructure in gigawatts anymore. We may be talking about terawatts. Every single one of those gigawatts needs memory to function. Without it, the compute is worthless. Most people heard that and thought about Nvidia but they should be thinking about Micron. Every AI model generating a response has two phases. The first is prefill, processing your prompt which is compute-heavy and the second is decode generating each word one token at a time and that phase is almost entirely memory-bound, not compute-bound. During decode, the GPU's processing units sit idle more than 95% of the time, waiting for data to arrive from memory. Google confirmed it in a research paper that decode-phase bottlenecks are dominated by memory bandwidth and capacity not raw compute. The GPU is not the bottleneck but the memory feeding the GPU is. This matters because inference is now where all the money lives. Training a model happens once, Inference happens billions of times a day every ChatGPT response, every Claude output, every agentic workflow running in the background and every one of those token streams is a billing event tied directly to memory performance. Adding more GPUs does not fix this because GPUs are already underutilized in inference because they are sitting idle waiting on memory. Adding more memory bandwidth and capacity is what directly reduces token cost, reduces latency, and allows the same cluster to serve dramatically more users simultaneously. Longer context windows compound the problem further, a model running a 1 million token context window requires dramatically more memory per session than a 10,000 token window, and every new model generation pushes context longer. The market treats memory as a downstream beneficiary of Nvidia orders. The correct framework is the opposite, Micron is the upstream constraint on how much value every Nvidia GPU can actually generate at inference scale. Micron guided Q4 to $50 billion in revenue, has HBM4 ramping at twice the pace of the prior generation, and CEO Sanjay Mehrotra has said supply will not catch demand before the end of 2027. At 8x forward earnings on $112 projected FY2027 EPS, Micron is the most undervalued infrastructure company in the entire AI stack. Inference is memory. Memory is Micron and the inference ramp has barely started. Milk Road Pro members are already up massively on this position and we're just getting started. If you want the full breakdown of what we're buying and why, come join us for just a dollar using the link below!
0:39

Micron is going to $4,000 and once you understand what inference actually is, the number stops sounding crazy (Save this). Dylan Patel just said that by 2030, OpenAI and Anthropic alone will need over 100 gigawatts of compute combined and by 2040, we may not even be measuring AI infrastructure in gigawatts anymore. We may be talking about terawatts. Every single one of those gigawatts needs memory to function. Without it, the compute is worthless. Most people heard that and thought about Nvidia but they should be thinking about Micron. Every AI model generating a response has two phases. The first is prefill, processing your prompt which is compute-heavy and the second is decode generating each word one token at a time and that phase is almost entirely memory-bound, not compute-bound. During decode, the GPU's processing units sit idle more than 95% of the time, waiting for data to arrive from memory. Google confirmed it in a research paper that decode-phase bottlenecks are dominated by memory bandwidth and capacity not raw compute. The GPU is not the bottleneck but the memory feeding the GPU is. This matters because inference is now where all the money lives. Training a model happens once, Inference happens billions of times a day every ChatGPT response, every Claude output, every agentic workflow running in the background and every one of those token streams is a billing event tied directly to memory performance. Adding more GPUs does not fix this because GPUs are already underutilized in inference because they are sitting idle waiting on memory. Adding more memory bandwidth and capacity is what directly reduces token cost, reduces latency, and allows the same cluster to serve dramatically more users simultaneously. Longer context windows compound the problem further, a model running a 1 million token context window requires dramatically more memory per session than a 10,000 token window, and every new model generation pushes context longer. The market treats memory as a downstream beneficiary of Nvidia orders. The correct framework is the opposite, Micron is the upstream constraint on how much value every Nvidia GPU can actually generate at inference scale. Micron guided Q4 to $50 billion in revenue, has HBM4 ramping at twice the pace of the prior generation, and CEO Sanjay Mehrotra has said supply will not catch demand before the end of 2027. At 8x forward earnings on $112 projected FY2027 EPS, Micron is the most undervalued infrastructure company in the entire AI stack. Inference is memory. Memory is Micron and the inference ramp has barely started. Milk Road Pro members are already up massively on this position and we're just getting started. If you want the full breakdown of what we're buying and why, come join us for just a dollar using the link below!

Milk Road AI

128,079 次观看 • 10 天前

NVIDIA sent us 2 DGX Sparks. For a while we wondered what we would do with them. The memory bandwidth is 273GB/s making it 3x slower than an M3 Ultra (819GB/s) for batch_size=1 inference. But it has 4x more FLOPS (100 TFLOPS compared to 26 TFLOPS). So we thought, what if we could combine the DGX Spark & M3 Ultra, and make use of both the massive compute on the DGX Spark and the massive memory-bandwidth on the M3 Ultra. We came up with a way to split inference across both devices and achieve a speedup of up to 4x for long prompts compared to the M3 Ultra on its own. Full details in the blog post linked below.
1:13

NVIDIA sent us 2 DGX Sparks. For a while we wondered what we would do with them. The memory bandwidth is 273GB/s making it 3x slower than an M3 Ultra (819GB/s) for batch_size=1 inference. But it has 4x more FLOPS (100 TFLOPS compared to 26 TFLOPS). So we thought, what if we could combine the DGX Spark & M3 Ultra, and make use of both the massive compute on the DGX Spark and the massive memory-bandwidth on the M3 Ultra. We came up with a way to split inference across both devices and achieve a speedup of up to 4x for long prompts compared to the M3 Ultra on its own. Full details in the blog post linked below.

Alex Cheema

281,225 次观看 • 8 个月前

"We have a supply-demand problem in energy today and we need more supply." Base Power CEO Zach Dell and Crusoe CEO Chase Lochmiller on why distributed power is the answer — and what's standing in the way: "We can deploy that capacity much faster and much cheaper than you can in a centralized way. You can do it on-site, and so you can circumvent the transmission constraints of the existing grid." "The way that you interconnect and get residential batteries permitted is completely different. Sometimes different not only at the state level, at the city level, at the AHJ level. That makes our job a lot harder." Chase on what it will take to get there: "A lot of people get scared about the amount of power that data centers are going to consume. They have a fixed pie mindset. We have the technology, the know-how, the capital. It's really about having clarity on the permitting process and the will to do so. It can create a really abundant future for everyone." The Hill & Valley Forum 2026 The Hill & Valley Forum Base Power Crusoe James Burnham
2:32

"We have a supply-demand problem in energy today and we need more supply." Base Power CEO Zach Dell and Crusoe CEO Chase Lochmiller on why distributed power is the answer — and what's standing in the way: "We can deploy that capacity much faster and much cheaper than you can in a centralized way. You can do it on-site, and so you can circumvent the transmission constraints of the existing grid." "The way that you interconnect and get residential batteries permitted is completely different. Sometimes different not only at the state level, at the city level, at the AHJ level. That makes our job a lot harder." Chase on what it will take to get there: "A lot of people get scared about the amount of power that data centers are going to consume. They have a fixed pie mindset. We have the technology, the know-how, the capital. It's really about having clarity on the permitting process and the will to do so. It can create a really abundant future for everyone." The Hill & Valley Forum 2026 The Hill & Valley Forum Base Power Crusoe James Burnham

The Hill & Valley Forum

13,368 次观看 • 3 个月前

SITUATION EXPLAINED: Cerebras raised $5.55 billion in their IPO and closing their first day of trading valued at $66 billion, making it the biggest US tech IPO since Snowflake in 2020. Cerebras makes Wafer-Scale Engine chips built for AI inference. We asked Sarah Fong the main difference between wafer-scale chips and traditional GPUs: - GPUs are great at parallel work (graphics, training) - AI inference is sequential, AKA one token at a time This causes the "memory wall" problem: - Every GPU core needs model weights, KV cache, and activations to do its math - On a GPU, that data lives in off-chip memory (HBM) - Cores constantly load and offload from off-chip memory, which is a huge bottleneck; hardware accounts for ~70% of inference latency Cerebras' chips: -Dinner-plate sized (vs. GPUs which are palm-sized) with tens of thousands of cores -Memory sits directly on top of the cores as distributed SRAM -Weights and KV cache can be accessed at on-chip speeds in the PB/s range, compared with off-chip speeds in the TB/s range achieved by GPUs with HBM.
3:14

SITUATION EXPLAINED: Cerebras raised $5.55 billion in their IPO and closing their first day of trading valued at $66 billion, making it the biggest US tech IPO since Snowflake in 2020. Cerebras makes Wafer-Scale Engine chips built for AI inference. We asked Sarah Fong the main difference between wafer-scale chips and traditional GPUs: - GPUs are great at parallel work (graphics, training) - AI inference is sequential, AKA one token at a time This causes the "memory wall" problem: - Every GPU core needs model weights, KV cache, and activations to do its math - On a GPU, that data lives in off-chip memory (HBM) - Cores constantly load and offload from off-chip memory, which is a huge bottleneck; hardware accounts for ~70% of inference latency Cerebras' chips: -Dinner-plate sized (vs. GPUs which are palm-sized) with tens of thousands of cores -Memory sits directly on top of the cores as distributed SRAM -Weights and KV cache can be accessed at on-chip speeds in the PB/s range, compared with off-chip speeds in the TB/s range achieved by GPUs with HBM.

MTS

44,057 次观看 • 1 个月前

ELON: TESLA FUTURE'S HINGES ON THE AI5 CHIP PROJECT "The AI5 chip, which is going to be a great chip, all of Tesla hinges on that chip. That's the chip that is going into our next generation of self-driving cars, and it's also essential for the Optimus robot. So that chip program was in bad shape. It wasn't closing because it's quite an ambitious chip design, and it really wasn't on a path to success. And then we also had the Dojo program, which was doing okay but not on a path to be competitive with NVIDIA. So I collapsed the two programs into just one program, which is to get everyone focused on the AI5 chip, which is essential. Continue to use NVIDIA for training, but we need the AI5 inference chip, which is a very powerful chip, but it's also a very low-power chip. So it doesn't use a lot of power. Its performance per watt is extremely good. I think it's probably going to be at least 2 to 4 times better than NVIDIA performance per watt at the inference level in the car and the robot. And I don't know, 10% of the cost of an NVIDIA chip, something like that. So these are very important numbers to achieve." Source: Elon Musk, Baron Capital, Ron Baron, Tesla
2:09

ELON: TESLA FUTURE'S HINGES ON THE AI5 CHIP PROJECT "The AI5 chip, which is going to be a great chip, all of Tesla hinges on that chip. That's the chip that is going into our next generation of self-driving cars, and it's also essential for the Optimus robot. So that chip program was in bad shape. It wasn't closing because it's quite an ambitious chip design, and it really wasn't on a path to success. And then we also had the Dojo program, which was doing okay but not on a path to be competitive with NVIDIA. So I collapsed the two programs into just one program, which is to get everyone focused on the AI5 chip, which is essential. Continue to use NVIDIA for training, but we need the AI5 inference chip, which is a very powerful chip, but it's also a very low-power chip. So it doesn't use a lot of power. Its performance per watt is extremely good. I think it's probably going to be at least 2 to 4 times better than NVIDIA performance per watt at the inference level in the car and the robot. And I don't know, 10% of the cost of an NVIDIA chip, something like that. So these are very important numbers to achieve." Source: Elon Musk, Baron Capital, Ron Baron, Tesla

Mario Nawfal

225,142 次观看 • 7 个月前

$NBIS cofounder Roman Chernin describes how their recent acquisitions of Eigen AI and Clarifai were all about speed, incredible talent, and acceleration: "The philosophy is very simple. We need to build so many things, and we need to move so fast, that we're always looking for people who can accelerate us. It should be exceptional talent, and/or something that has a great adoption." "Our two recent acquisitions [were] two teams that work on inference optimization. A big part of our business is how efficiently we convert GPUs into tokens. And these two teams — Eigen AI and Clarifai — one is focused on model optimization, the engine of inference. How you run specific models and all the techniques around spec decoding, quantization, and so on." "And the other is system optimization. All the routing, KV caching, and orchestration across the big cluster of compute and so on." "We have a very strong internal team working on inference. But we felt that we needed to move faster, bring more capabilities. Because the market is so fast."
2:32

$NBIS cofounder Roman Chernin describes how their recent acquisitions of Eigen AI and Clarifai were all about speed, incredible talent, and acceleration: "The philosophy is very simple. We need to build so many things, and we need to move so fast, that we're always looking for people who can accelerate us. It should be exceptional talent, and/or something that has a great adoption." "Our two recent acquisitions [were] two teams that work on inference optimization. A big part of our business is how efficiently we convert GPUs into tokens. And these two teams — Eigen AI and Clarifai — one is focused on model optimization, the engine of inference. How you run specific models and all the techniques around spec decoding, quantization, and so on." "And the other is system optimization. All the routing, KV caching, and orchestration across the big cluster of compute and so on." "We have a very strong internal team working on inference. But we felt that we needed to move faster, bring more capabilities. Because the market is so fast."

TBPN

30,486 次观看 • 1 个月前

Sam Altman says the AI infrastructure race is not about bigger chatbots. It is about shifting the planet's intellectual output from human brains to AI brains. "If people knew what we could do with compute, they would want way, way more." "The thing I am personally most excited about is to use AI and lots of compute to discover new science." "A recent cool example here is we built the Sora Android app using Codex... in less than a month." "You can imagine that way much further, where entire companies can build their products using lots of compute." Then he gives the scale: "Let's say that an AI company today might be generating something on the order of 10 trillion tokens a day out of frontier models." "We're going to have these models at a company be outputting more tokens per day than all of humanity put together, and then 10 times that, and then 100 times that." The bottleneck is moving from software talent to compute supply, inference speed, product integration, and where all that machine intelligence gets pointed.
3:31

Sam Altman says the AI infrastructure race is not about bigger chatbots. It is about shifting the planet's intellectual output from human brains to AI brains. "If people knew what we could do with compute, they would want way, way more." "The thing I am personally most excited about is to use AI and lots of compute to discover new science." "A recent cool example here is we built the Sora Android app using Codex... in less than a month." "You can imagine that way much further, where entire companies can build their products using lots of compute." Then he gives the scale: "Let's say that an AI company today might be generating something on the order of 10 trillion tokens a day out of frontier models." "We're going to have these models at a company be outputting more tokens per day than all of humanity put together, and then 10 times that, and then 100 times that." The bottleneck is moving from software talent to compute supply, inference speed, product integration, and where all that machine intelligence gets pointed.

Karl Mehta

16,536 次观看 • 12 天前

ELON MUSK: "We're starting off with an advanced technology fab here in Austin, and I'd like to thank Greg Abbott and the state of Texas for the support. So in the advanced technology fab, we will have all of the equipment necessary to make a chip of any kind logical memory, and we will also have all of the equipment necessary to make the masks. So in a single building, we can create a mask, make the chip, test the chip, make another mask, and have an incredibly fast recursive loop for improving the chip design. To the best of my knowledge, this doesn't exist anywhere in the world. We're really going to push the limit of physics in compute, and we're going to try a bunch of wild and crazy things, which you can do if you've got that fast iteration loop that I can't emphasize enough the importance of being able to make it, to test it and and then make and then change the design, do another one, and have that in a single building."
2:03

ELON MUSK: "We're starting off with an advanced technology fab here in Austin, and I'd like to thank Greg Abbott and the state of Texas for the support. So in the advanced technology fab, we will have all of the equipment necessary to make a chip of any kind logical memory, and we will also have all of the equipment necessary to make the masks. So in a single building, we can create a mask, make the chip, test the chip, make another mask, and have an incredibly fast recursive loop for improving the chip design. To the best of my knowledge, this doesn't exist anywhere in the world. We're really going to push the limit of physics in compute, and we're going to try a bunch of wild and crazy things, which you can do if you've got that fast iteration loop that I can't emphasize enough the importance of being able to make it, to test it and and then make and then change the design, do another one, and have that in a single building."

DogeDesigner

16,950,279 次观看 • 3 个月前

Elon Musk: At Tesla, we basically had two different chip programs: one Dojo and one. Dojo on the training side, and then what we call AI4, it's just our inference chip The AI4 is what's currently shipping in all vehicles, and we're finalizing the design of AI5, which will be an immense jump from AI4. By some metrics, the improvement in AI5 will be 40 times better than AI4. So not 40%, 40 times This is because we work so closely at a very fine-grained level on the AI software and the AI hardware. So we know exactly where the limiting factors are. And so effectively the AI hardware and software teams are co-designing the chip Compared to the worst limitation on AI4, which is running the SoftMax operation, we currently have to run SoftMax in around 40 steps in emulation mode, whereas that'll just be done in a few steps natively in AI5 AI5 will also be able to easily handle mixed precision models, so you don't have it, it'll dynamically handle mixed precision. There's a bunch of sort of technical stuff that AI5 will do a lot better In terms of nominal raw compute, it's eight times more compute, about nine times more memory, and roughly five times more memory bandwidth But because we're addressing some core limitations in AI4, you multiply that 8x compute improvement by another 5x improvement because of optimization at a very fine-grained silicon level of things that are currently suboptimal in AI4, that's where you get the 40x improvement
2:03

Elon Musk: At Tesla, we basically had two different chip programs: one Dojo and one. Dojo on the training side, and then what we call AI4, it's just our inference chip The AI4 is what's currently shipping in all vehicles, and we're finalizing the design of AI5, which will be an immense jump from AI4. By some metrics, the improvement in AI5 will be 40 times better than AI4. So not 40%, 40 times This is because we work so closely at a very fine-grained level on the AI software and the AI hardware. So we know exactly where the limiting factors are. And so effectively the AI hardware and software teams are co-designing the chip Compared to the worst limitation on AI4, which is running the SoftMax operation, we currently have to run SoftMax in around 40 steps in emulation mode, whereas that'll just be done in a few steps natively in AI5 AI5 will also be able to easily handle mixed precision models, so you don't have it, it'll dynamically handle mixed precision. There's a bunch of sort of technical stuff that AI5 will do a lot better In terms of nominal raw compute, it's eight times more compute, about nine times more memory, and roughly five times more memory bandwidth But because we're addressing some core limitations in AI4, you multiply that 8x compute improvement by another 5x improvement because of optimization at a very fine-grained silicon level of things that are currently suboptimal in AI4, that's where you get the 40x improvement

X Freeze

21,221,246 次观看 • 8 个月前

We asked James Wang why Cerebras can run large models so quickly. His answer: Inference speed is mostly a memory problem. Instead of constantly pulling weights from external memory, Cerebras splits the model across multiple wafers and pipelines the layers together. “Inference is all about memory bandwidth.” “You don’t want to store weights external to the wafer, because the second it’s outside, it becomes much slower.” “We put the weights on the inside.” “The team built a new software stack that basically lets us split the models by layer and store them layer by layer across multiple wafers.” “That allows us to never have to read from external memory, and that’s what makes it so fast.” “For context, Claude is about 100 tokens per second.”
1:31

We asked James Wang why Cerebras can run large models so quickly. His answer: Inference speed is mostly a memory problem. Instead of constantly pulling weights from external memory, Cerebras splits the model across multiple wafers and pipelines the layers together. “Inference is all about memory bandwidth.” “You don’t want to store weights external to the wafer, because the second it’s outside, it becomes much slower.” “We put the weights on the inside.” “The team built a new software stack that basically lets us split the models by layer and store them layer by layer across multiple wafers.” “That allows us to never have to read from external memory, and that’s what makes it so fast.” “For context, Claude is about 100 tokens per second.”

MTS

27,935 次观看 • 1 个月前

Etched CEO Gavin Uberti: "People don't realize how big of a market inference is going to be." "Right now, only a couple million people have access to the frontier models, and those are going to have to get deployed to 8 billion people across the globe. And that's not even counting AI agents that exist already, and will exist in the future." "There need to be way, way more tokens produced, and that requires much bigger assembly lines, many more factories, and some new technology."
0:46

Etched CEO Gavin Uberti: "People don't realize how big of a market inference is going to be." "Right now, only a couple million people have access to the frontier models, and those are going to have to get deployed to 8 billion people across the globe. And that's not even counting AI agents that exist already, and will exist in the future." "There need to be way, way more tokens produced, and that requires much bigger assembly lines, many more factories, and some new technology."

TBPN

62,252 次观看 • 10 天前

DeepMind CEO Demis Hassabis says the AI bottleneck is already moving from model ideas to physical supply chains. "How much of the restriction at this point is physical? I am talking memory shortage, GPU shortage, and electricity." Demis: "That is constraining a lot of the deployment for sure. We see so much more demand for our models - Gemini and the other models that we have - than we can possibly serve." Then the less obvious part: "It does constrain a little bit the research, because you need a lot of chips to be able to experiment on new ideas at big enough scale that you can actually see if they are going to work." And on memory: "The whole supply chain is kind of strained... It still in the end actually comes down to a few suppliers of a few of the key components. Anywhere where there is some kind of constraint on the capacity, there is a sort of choke point." Important framing: The next AI race is not just who has the best model architecture. It is who can secure memory, chips, power, suppliers, and enough experimental capacity to find the next breakthrough before everyone else.
1:09

DeepMind CEO Demis Hassabis says the AI bottleneck is already moving from model ideas to physical supply chains. "How much of the restriction at this point is physical? I am talking memory shortage, GPU shortage, and electricity." Demis: "That is constraining a lot of the deployment for sure. We see so much more demand for our models - Gemini and the other models that we have - than we can possibly serve." Then the less obvious part: "It does constrain a little bit the research, because you need a lot of chips to be able to experiment on new ideas at big enough scale that you can actually see if they are going to work." And on memory: "The whole supply chain is kind of strained... It still in the end actually comes down to a few suppliers of a few of the key components. Anywhere where there is some kind of constraint on the capacity, there is a sort of choke point." Important framing: The next AI race is not just who has the best model architecture. It is who can secure memory, chips, power, suppliers, and enough experimental capacity to find the next breakthrough before everyone else.

Karl Mehta

25,716 次观看 • 14 天前

ELON MUSK: The Future of AI Power is in Space, Not on Earth. "Once you start thinking in terms of what percentage of the sun's power are you harnessing? You realize you have to go to space and you can't scale very much on Earth. All of the United States currently uses only half a terawatt per hour on average. So you know, if you say a terawatt, that would be twice as much electricity as the United States currently consumes. So that's quite a lot. It's actually very difficult to build power plants and then you don't just need the power plants, you need all of the electrical equipment. Need the electrical transformers to run the transformers. You can build power plants. That's what we did at xAI for Colossus 2. It's very difficult to scale other forms of power. You can scale potentially solar. Solar cells are already very cheap. Now put it in space and it's 10 times cheaper because you don't need any batteries. So the moment your cost of access to space becomes low. By far, the cheapest and most scalable way to generate tokens is space. It's not even close. It'll be an order of magnitude easier to scale five years from now. My prediction is we will launch and be operating every year more AI in space than the cumulative total on Earth."
2:09

ELON MUSK: The Future of AI Power is in Space, Not on Earth. "Once you start thinking in terms of what percentage of the sun's power are you harnessing? You realize you have to go to space and you can't scale very much on Earth. All of the United States currently uses only half a terawatt per hour on average. So you know, if you say a terawatt, that would be twice as much electricity as the United States currently consumes. So that's quite a lot. It's actually very difficult to build power plants and then you don't just need the power plants, you need all of the electrical equipment. Need the electrical transformers to run the transformers. You can build power plants. That's what we did at xAI for Colossus 2. It's very difficult to scale other forms of power. You can scale potentially solar. Solar cells are already very cheap. Now put it in space and it's 10 times cheaper because you don't need any batteries. So the moment your cost of access to space becomes low. By far, the cheapest and most scalable way to generate tokens is space. It's not even close. It'll be an order of magnitude easier to scale five years from now. My prediction is we will launch and be operating every year more AI in space than the cumulative total on Earth."

DogeDesigner

37,485 次观看 • 5 个月前

THIS CLUSTER OF 4 MAC STUDIOS USES LESS POWER THAN ONE NVIDIA CHIP - AND COSTS 5X LESS 17:30 the number hits hard - 600 watts for all four Mac Studios - less than one H200 that costs $30,000 on its own instead of one $30,000 GPU you get 4 machines with 1.5TB of memory, 3x more performance and models that simply cannot run on a single chip Apple quietly added RDMA over Thunderbolt in a beta update - latency dropped 99% and the same cluster became 3x faster without buying any new hardware before the update: 5 tokens per second. after: 15.5 - a free upgrade through a software update 8 Nvidia DGX Sparks for the same memory would cost $32,000 - this cluster costs a fraction and gets faster with every update 10x more productive at half the price - and the only thing you need is knowing where to look
20:03

THIS CLUSTER OF 4 MAC STUDIOS USES LESS POWER THAN ONE NVIDIA CHIP - AND COSTS 5X LESS 17:30 the number hits hard - 600 watts for all four Mac Studios - less than one H200 that costs $30,000 on its own instead of one $30,000 GPU you get 4 machines with 1.5TB of memory, 3x more performance and models that simply cannot run on a single chip Apple quietly added RDMA over Thunderbolt in a beta update - latency dropped 99% and the same cluster became 3x faster without buying any new hardware before the update: 5 tokens per second. after: 15.5 - a free upgrade through a software update 8 Nvidia DGX Sparks for the same memory would cost $32,000 - this cluster costs a fraction and gets faster with every update 10x more productive at half the price - and the only thing you need is knowing where to look

Noisy

105,595 次观看 • 20 天前

Many still don’t understand why Elon is building Terafab Terafab is an extension to all the chip makers in the world It’s not about replacement, not a rivalry and absolutely not competing It’s being built to fulfill the massive chip orders that Tesla, SpaceX and xAI actually need TSMC’s most advanced 2nm capacity is totally booked through 2028 Tesla signed a massive $16.5 billion deal with Samsung back in July 2025 to produce AI6 chips at their Taylor, Texas factory and Samsung is building a Tesla Exclusive chip manufacturing plant to full fill this orders When Elon announced Terafab on March 21, 2026...he made it clear: “That rate is much less than we’d like. We either build the Terafab or we don’t have the chips, and we need the chips, so we build the Terafab” He basically told the chip makers: “Produce as much as you comfortably can. We will take them all. Actually we want even more” Even today Elon said: "SpaceX/Tesla will be always be major customers of TSMC and not competitors in the normal sense of the word" Current production rates are much less than they need....That’s why Terafab exists Terafab is an extension to every chip maker… not competition, not rivalry, absolutely not Even Intel has joined as a partner Even if chip supply improves, massive bottlenecks still exist with memory and advanced packaging You simply can't risk those supply chain breaks at this scale That’s why Terafab is being built to vertically integrate everything - chips, memory, advanced packaging all under one roof, targeting 1 terawatt of AI compute capacity per year This is a ludicrous amount of chips that no chipmaker currently produces at this scale. I don't think even TSMC and Samsung truly understand these numbers yet It’s about building the capacity the future actually demands
0:36

Many still don’t understand why Elon is building Terafab Terafab is an extension to all the chip makers in the world It’s not about replacement, not a rivalry and absolutely not competing It’s being built to fulfill the massive chip orders that Tesla, SpaceX and xAI actually need TSMC’s most advanced 2nm capacity is totally booked through 2028 Tesla signed a massive $16.5 billion deal with Samsung back in July 2025 to produce AI6 chips at their Taylor, Texas factory and Samsung is building a Tesla Exclusive chip manufacturing plant to full fill this orders When Elon announced Terafab on March 21, 2026...he made it clear: “That rate is much less than we’d like. We either build the Terafab or we don’t have the chips, and we need the chips, so we build the Terafab” He basically told the chip makers: “Produce as much as you comfortably can. We will take them all. Actually we want even more” Even today Elon said: "SpaceX/Tesla will be always be major customers of TSMC and not competitors in the normal sense of the word" Current production rates are much less than they need....That’s why Terafab exists Terafab is an extension to every chip maker… not competition, not rivalry, absolutely not Even Intel has joined as a partner Even if chip supply improves, massive bottlenecks still exist with memory and advanced packaging You simply can't risk those supply chain breaks at this scale That’s why Terafab is being built to vertically integrate everything - chips, memory, advanced packaging all under one roof, targeting 1 terawatt of AI compute capacity per year This is a ludicrous amount of chips that no chipmaker currently produces at this scale. I don't think even TSMC and Samsung truly understand these numbers yet It’s about building the capacity the future actually demands

X Freeze

53,291 次观看 • 2 个月前

Anthropic's Sholto Douglas describes the concept of a software-only singularity: "It's one where the models are far better at digital tasks than they are at physical ones. And so we see rapid change in the digital world with models, and relatively little change in the physical world. So information and software changes dramatically, and this ends up having some pretty weird effects." "It means that maybe like the drivers of what have been the last couple decades of progress in the economy turn around." "And I think we'll see that flow on into the physical world but at a delay. So you get much better at doing chip design. You get much better at training AI models. AI models get a lot faster. Chips get a lot better. The general economy gets a lot more efficient because the sort of information and message parsing that is much of the rest of the economy ends up becoming much more efficient." "But at the same time you don't yet have robots providing limitless physical abundance. Science probably progresses really fast up to the degree that you need interaction with labs or larger particle colliders or something like this. And then you go, 'Okay well I need to build the robots.'"
3:13

Anthropic's Sholto Douglas describes the concept of a software-only singularity: "It's one where the models are far better at digital tasks than they are at physical ones. And so we see rapid change in the digital world with models, and relatively little change in the physical world. So information and software changes dramatically, and this ends up having some pretty weird effects." "It means that maybe like the drivers of what have been the last couple decades of progress in the economy turn around." "And I think we'll see that flow on into the physical world but at a delay. So you get much better at doing chip design. You get much better at training AI models. AI models get a lot faster. Chips get a lot better. The general economy gets a lot more efficient because the sort of information and message parsing that is much of the rest of the economy ends up becoming much more efficient." "But at the same time you don't yet have robots providing limitless physical abundance. Science probably progresses really fast up to the degree that you need interaction with labs or larger particle colliders or something like this. And then you go, 'Okay well I need to build the robots.'"

TBPN

208,090 次观看 • 5 个月前