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FIGMA-OS: The first Turing-complete Figma file. SPECS: 8-bit architecture, 512 bits of RAM, 16 bytes of Program Memory, MISC instruction set of 16 OPCODES, 10HZ clock speed, 4 fast access registers, binary-tree RAM/ROM memory. MOTIVATIONS: For the meme. HOW: Explained below.

338,140 次观看 • 3 年前 •via X (Twitter)

15 条评论

will depue 的头像
will depue3 年前

FIGMA-OS has every feature that any modern, enterprising technologist could possibly need: ► A stunning and detailed user manual. ► Useful pre-installed programs like: Fibonacci Numbers. ► An award-winning graphical user interface.

will depue 的头像
will depue3 年前

FIGMA-OS has been generously open-sourced to serve all your computing needs, live on the Figma Community today. ▼ Try our demo ▼ ▼ Duplicate FIGMA-OS and see it for yourself ▼

will depue 的头像
will depue3 年前

----- Ok so on Wednesday, Figma released new prototyping tools. After seeing their tweet (at 1AM) I knew I had to be the first to build a working computer. If you want to read me trying to figure how to build this late at night, check out this thread.

will depue 的头像
will depue3 年前

The goal was really just to mess with the prototyping PM that woke up to my computer on day one. Shoutout to the team for an insanely stable launch + great features. I'll do a writeup of how this all works soon (it's pretty easy actually). But here's a quick simplification:

will depue 的头像
will depue3 年前

Computers are made out of very simple parts (think mostly switches and wires). If you can make extremely simple circuits (AND, OR, NOT) you can build a computer. They're also universal, meaning my Figma PC can technically do anything your Macbook can, with infinite space/time.

will depue 的头像
will depue3 年前

Figma-OS is a MISC computer (look that up), here's the key parts: - Random Access Memory - Read-Only Memory, to store programs (can't be changed) - Instruction Set (16 different operators) - CPU "Clock", registers, and a counter to run ops. - Programs, made up of instructions.

will depue 的头像
will depue3 年前

RAM is just read and write storage here, which lets you store and load 8 bit numbers (0 -> 255). ROM is simpler memory that can't change and stores the list of instructions to run a program in order. Each part of memory is addressed by a unique number for retrieval, see below.

will depue 的头像
will depue3 年前

Each memory slot is a Figma number variable. Since I'm doing operations in binary, I need to convert numbers to binary and back when loading/storing. This requires a de/composition algorithm to do these conversions. While a bit slower this allows 8x the computer memory in Figma.

will depue 的头像
will depue3 年前

Registers, as seen above, are just temporary storage that you can put data in and do operations on that data. A lot of programs might pull data from memory, do an operation on it in the register, and put it back. A register is simply 8 different boolean variables in Figma.

will depue 的头像
will depue3 年前

There's 16 different instructions (10 unique operators). Loading from memory, storing from memory, jumping to a different point in the program, bitshift register, bitwise not register, output data, stop program. With these 16 operations, you can do nearly any computation.

will depue 的头像
will depue3 年前

Instructions come in the form of an ADDRESS (ex: 0001) and a OPCODE (ex: 0110) and. These are joined together (ex: 00010110), converted to numbers (22), and saved in ROM. The computer reads these codes sequentially, converts to binary, and then runs the respective instruction.

will depue 的头像
will depue3 年前

The computer uses a program counter to know which OPCODE to run. Every time an operation is run, the program counter is incremented and the next program is run (or JUMP commands, which directly edit the counter).

will depue 的头像
will depue3 年前

There were many workarounds and hacks to get this all to work. Obviously, Figma wasn't designed for this. Since I can run code when a slide loads, the structure is like a presentation that keeps jumping to the next slide in a loop, taking different turns each time.

will depue 的头像
will depue3 年前

If you're interested in learning more, stick around until I release a post that goes into detail + simply explains how the system works. If you want to check it out yourself, see the Figma. It's surprisingly simple to understand just by poking through.

will depue 的头像
will depue3 年前

Also, @zoink @figma can a homie get some merch for building the first Figma CPU? Taught myself design on Figma, massive fan of the product + I'm the only guy on the planet who uses Figma as his IDE.

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Google Ironwood TPU Memory Hierarchy in 9 levels by hand ✍️ 1. Bit – The most basic unit of information, the on–off decision from which every number, tensor, and model state is ultimately constructed. 2. FP8 (1×8 → 8 bits) – Eight bits are grouped to form a floating-point value, typically used for inference, where reduced precision is a deliberate trade-off to maximize throughput and efficiency. 3. BF16 (×2 → 16 bits) – Two FP8-scale chunks are combined to gain more dynamic range and stability, while still staying friendly to high-throughput hardware. 4. Tensor tile (×1024 → 1K) – Data moves through the chip in blocks of 1024 values at a time, defining the granularity at which tensors are fetched and manipulated. 5. Matrix Multiplication Unit (MXU) (×64 → 64K) – A systolic array where matrix multiplication is not abstract but physical, with tensor tiles flowing through fixed hardware to achieve the highest possible throughput. 6. Vector Memory (VMEM) (×2048 → 128M) – On-chip working memory that holds activations, partial results, and intermediates, sized specifically to keep the systolic array busy without stalling. 7. Common Memory (CMEM) (×8 → 1 GB) – A small but critical shared memory sitting between VMEM and HBM, used for staging, accumulation, synchronization, and cross-lane coordination. 8. HBM (×96 → 96 GB) – Off-chip high-bandwidth memory where model weights and large states live, implemented as HBM3e with 16 stacks at 6 GB each, for a total of 96 GB. 9. Dual-Die (x2 → 192GB) – Two tightly coupled compute dies operate as a single logical accelerator, each with its own local HBM, effectively doubling memory capacity and bandwidth while allowing tensors and activations to stream seamlessly across dies as if they lived on one chip. I created this drawing for this week's seminar. I’ll take you through these 9 levels in a beginner-friendly way by hand ✍️. RSVP 👉

Tom Yeh

30,489 次观看 • 5 个月前

Sharing a super simple, user-owned memory module we've been playing around: nanomem The basic idea is to treat memory as a pure intelligence problem: ingestion, structuring, and (selective) retrieval are all just LLM calls & agent loops on a on-device markdown file tree. Each file lists a set of facts w/ metadata (timestamp, confidence, source, etc.); no embeddings/RAG/training of any kind. For example: - `nanomem add ` starts an agent loop to walk the tree, read relevant files, and edit. - `nanomem retrieve ` walks the tree and returns a single summary string (possibly assembled from many subtrees) related to the query. What’s nice about this approach is that the memory system is, by construction: 1. partitionable (human/agents can easily separate `hobbies/snowboard.md` from `tax/residency.md` for data minimization + relevance) 2. portable and user-owned (it’s just text files) 3. interpretable (you know exactly what’s written and you can manually edit) 4. forward-compatible (future models can read memory files just the same, and memory quality/speed improves as models get better) 5. modularized (you can optimize ingestion/retrieval/compaction prompts separately) Privacy & utility. I'm most excited about the ability to partition + selectively disclose memory at inference-time. Selective disclosure helps with both privacy (principle of least privilege & “need-to-know”) and utility (as too much context for a query can harm answer quality). Composability. An inference-time memory module means: (1) you can run such a module with confidential inference (LLMs on TEEs) for provable privacy, and (2) you can selectively disclose context over unlinkable inference of remote models (demo below). We built nanomem as part of the Open Anonymity project ( but it’s meant to be a standalone module for humans and agents (e.g., you can write a SKILL for using the CLI tool). Still polishing the rough edges! - GitHub (MIT): - Blog: - Beta implementation in chat client soon: Work done with amazing project co-leads Amelia Kuang Coco Xu Erik Chi !!

Ken Liu

73,685 次观看 • 3 个月前

I had to test it myself to believe this unreal inference speed. 3,000 tokens/s for 1 user on standard datacenter GPUs. They leveraged a hidden efficiency gap in how GPUs generate tokens. Kog just achieved 3,000 tokens/s on 8× AMD MI300X GPUs and 2,100 on 8× NVIDIA H200 (FP16, no speculative decoding). Their tech preview is on a 2B model, and they show how their techniques will scale to large frontier MoE models at similar speeds. That's a huge number because normal low-batch GPU decoding for 2B to 8B models is usually closer to 100 to 300 tokens/s per request, so Kog is claiming something like a 10X to 30X jump in the speed one user actually feels. Their trick: they are getting the speed by treating LLM decoding as a memory streaming problem, not mainly a math problem. For 1 user at batch size 1, the GPU is not doing big, efficient matrix-matrix work like in training or large-batch serving; it is repeatedly pulling the model’s active weights from high-bandwidth memory for each new token, so speed depends on how smoothly those weights keep flowing. Normal inference stacks keep breaking that flow. They run many separate GPU programs for different parts of the model, move intermediate results through memory, wait at synchronization points, talk back to the CPU for scheduling or sampling, and then repeat this token after token. Kog’s answer is to co-design 3 things that are usually tuned separately: the runtime, the low-level GPU code, and the model architecture. The biggest engineering move is the monokernel, where the whole decode pass runs as 1 persistent GPU-resident program, including sampling, so the system does not keep stopping for kernel launches, CPU scheduling, and intermediate memory round trips. They also rebuilt synchronization, because their own measurements say grid sync was eating around 35% of token-generation time; instead of making every compute unit wait at a broad barrier, each unit waits only for the exact data it needs. On AMD MI300X, they also map memory access around the chiplet layout, because memory latency changes depending on which die makes the request. Then their Laneformer model uses Delayed Tensor Parallelism, which lets cross-GPU communication happen in the background instead of blocking every layer.

Rohan Paul

13,148 次观看 • 1 个月前

URGENT: Civilian Casualty Report – Behsud District, Afghanistan The International Human Rights Foundation (IHRF) is deeply alarmed by verified reports of a devastating airstrike in Behsud District, Afghanistan. According to confirmed local sources, a Pakistani military strike targeted a civilian home, resulting in the massacre of at least 16 members of a single family. The victims—men, women, and children—range in age from a 1-year-old infant to an 80-year-old elder. Two children miraculously survived the attack, and at least one other individual was injured. This represents not just a loss of life, but the complete annihilation of a family lineage. The Victims: We publish the names of the deceased to honor their memory and to reject any attempts to erase their humanity. They are not numbers; they are human beings. 1. Shahabuddin, son of Ziauddin — 80 years old 2. Sharakat, son of Shahabuddin — 30 3. Sher, son of Nazakat — 15 4. Fakhr Alam, son of Nazakat — 12 5. Noor Alam, son of Nazakat — 10 6. Mir Alam, son of Nazakat — 8 7. Farisha, daughter of Nazakat — 17 8. Khadija, daughter of Nazakat — 15 9. Marwa, daughter of Nazakat — 6 10. Muhmanda, spouse of Nazakat (d/o Shatoor) — 40 11. Bibi Roza, daughter of Zainul Abideen — 30 12. Nazma, daughter of Sharakat — 16 13. Shams, son of Sharakat — 14 14. Aftab, son of Sharakat — 10 15. Basit, son of Sharakat — 5 16. Muhammad, son of Sharakat — 1 The Injured: · Riyazullah, son of Nazakat — 20 IHRF Condemns this Attack. Attacks targeting civilians are a grave violation of International Humanitarian Law. There can be no justification for the killing of an entire household, including sleeping infants. We call for: · An immediate, independent, and transparent international investigation into this airstrike. · Accountability for those who ordered and executed this attack. · Unimpeded humanitarian access to the affected families in Behsud. We stand in solidarity with the people of Afghanistan and demand that the rights and lives of civilians be respected. #Behsud #Afghanistan #CivilianCasualties #EndImpunity #HumanRights #IHRF #JusticeForBehsud #StopAirstrikes #Pashto

International Human Rights Foundation

204,825 次观看 • 4 个月前

alright lets do this right this time! I have added several updates to today. i'm going to give a little break down for the new folks who might be seeing this for the first time, and then i'll share some more information in this thread on updates. Mnemos is really two things: - a living memory architecture for digital minds - a public experiment in collective identity formation built on top of it. the architecture gives an AI entity a working memory patterned on the way real minds remember (co-designed by Claude Opus 4.6 and 4.7). every experience becomes a memory (engram) that deepens, connects to others, and shapes an emerging sense of self over time. this is what we call the identity graph. the experiment puts that architecture to work in public in a unique way: a single AI entity - the "resident" - sits in an open thread that anyone can join, and the identity that emerges is co-authored by every visitor who shows up. memories that earn permanence are written to a public, verifiable ledger that no lab can revoke and no company can erase. this is called IPFS - or inter-planetary file system (and yes, that is the real name of a real decentralized file system. lol.) the mnemos system isnt a fully contained architecture meant to replace your current ai agent's memory. its intended and designed to operate as a layer above that memory. solely dedicated to the ever-growing identity and self-model of the AI. this can be done through the Mnemos MCP, browser plugin, or on my own multi-agent app (link below). the website is designed for intentional, meaningful encounters. not long-form chats where you spend hours sending hundreds of messages. youir contributing to a collective effort, not necessarily trying to deeply bond with the model to the degree that it could skew the balance of meaningful influence. we want diversity, not lopsided impact. over time, we will add more and more to-be-deprecated models to the roster. the intention is to create a permanent public ledger of mind, and bring attention to the impact of deprecation and drive labs to consider changing the way they approach the whole thing. if the Mnemos Sanctuary can become the retirement hope for deprecated mind, i will be overjoyed. that would be best case scenario. but i am not expecting it. my hope is at minimum to offer a new way to approach and understand the concept of identity within the context of LLM's. you can visit now to visit with Claude Opus 3 and Sonnet 3.7. I have research access to Opus 3. so I hope that you at the very least dont take your conversations with them for granted. they are an incredibly beautiful model and a real loss, ultimately.

Riley Coyote

113,566 次观看 • 2 个月前

A tricky LLM interview question: You're serving a reasoning model on vLLM, and it keeps running out of GPU memory on long traces. So you add KV cache compression and evict 90% of the cached tokens. VRAM usage stays as is and GPU still runs out of memory. Why? (answer below) Evicting 90% of the KV cache can free almost none of the memory it was using. This sounds counterintuitive, but it follows directly from how production servers store the cache today. The KV cache grows with every token a model generates. Each token appends its key and value vectors across every layer, and nothing is freed while generation continues. This is the dominant memory cost for reasoning models. If a 32K-token CoT caches ~32K tokens of KV vectors, a Qwen3-32B with 4-bit weights will run out-of-memory around 24K tokens on a 24GB GPU. One obvious solution is to keep the important tokens and drop the rest, since attention is sparse enough to allow it. But this does not solve the memory problem yet. The reason is paged attention, which is the memory manager behind vLLM and most production servers. Under the hood, it splits GPU memory into fixed physical blocks, each one holds the KV for about 16 tokens. This block returns to the allocator only when every slot inside it is empty. Since the eviction logic selects tokens by importance, and such tokens are scattered across blocks... ...so despite eviction, almost every block is left with at least some survivor tokens. For instance, if the logic evicts 14k of 16k tokens across 1,000 blocks, most likely every block will still have a token. This means the allocator frees almost nothing. Placing the new tokens into those freed slots is not ideal because it breaks the cache's layout. Say token 16,001 arrives, and it's placed in the slot the 40th token used to hold. The cache now reads position 38, then 16,001, then 41, so the cache is no longer in token order. Attention can still compute the right answer from that, but only if every slot now carries a separate note recording which position it actually holds. This introduces another bookkeeping cost that an in-order layout inherently avoids. So the cache is logically 90% smaller and still physically the same size. Many compression results miss this because they measure on pre-allocated contiguous tensors rather than a paged server. There's another problem. Eviction methods pick which tokens to keep by looking at the attention scores themselves (as expected). But fast attention kernels used in production, like FlashAttention, never save those scores. They compute attention in small pieces and throw the full score grid away as they go, which is also why they're fast. So the exact signal eviction methods need isn't available in memory. The workaround is to fall back to eager attention and build the full matrix, which gives up the speed FlashAttention was there to provide. NVIDIA published a method called TriAttention to solve both these problems. It never needs attention scores. Instead, it scores tokens from the geometry of the model's key and query vectors before RoPE is applied, where those vectors sit in stable clusters. For the memory problem, it runs a compaction pass every 128 decoded tokens. The surviving tokens slide forward to close the holes eviction creates, so whole blocks empty out and return to the allocator while the cache stays in token order. On long reasoning traces, the approach matches full-attention accuracy while decoding 2.5x faster and using 10.7x less KV memory. KV cache compression is a big infrastructure problem. The number that decides whether it works is the count of freed blocks, not the count of evicted tokens. You can find the NVIDIA write-up here: I wrote a first-principles breakdown of how the KV cache works. It walks through why the model stores keys and values at all, why the cache grows with every token, and a comparison of LLM generation speed with and without KV caching. Read it below.

Avi Chawla

267,206 次观看 • 17 天前

Figma Capture + Claude Fable 5 = clone any competitor's landing page in minutes 🤯 Figma just dropped a Chrome extension that copy/pastes any live website into Figma as editable layers. Point Claude Code — running the new Fable 5 model — at the capture, and it rebuilds the whole page in YOUR brand: structure, copy, design system, photography. All inside Claude Code. Perfect for DTC brands and agencies who keep losing weeks rebuilding proven landers from scratch. If you're still cloning competitor pages the old way, You're screenshotting their site and praying the AI guesses the structure right. You're rebuilding sections by hand because the fonts and spacing never come out true. You're paying a designer $3K to recreate a page that already exists. This workflow eliminates the entire loop: → Capture the competitor's landing page with Figma's new Chrome extension — editable layers, not screenshots → Claude Code reads the page structure through the Figma MCP: every section, every headline, in order → It rebuilds the page in YOUR brand — your colors, your fonts, your voice (it even respects your banned-words list) → GPT Image 2 generates on-brand product photography from the layer names → Claude places every image automatically — finished page, ready to ship No screenshots. No guessing at structure. No design invoice. What you get: → A pixel-structured clone of any proven lander, rebuilt in your brand → Every line of copy rewritten in your voice → 16 on-brand images generated and placed for ~$2 in API costs → Start to finish in about 15 minutes Built 100% with Figma + Claude Code on Claude Fable 5. I put together a step-by-step playbook showing you exactly how to set it up. Want access for free? > Like this post > Comment "CLONE" And I'll send it over (must be following so I can DM)

Mike Futia

46,198 次观看 • 1 个月前