Finally CPS3 boots on FPGA. The compiler was doing a wrong simplification breaking the logic. This was debugged on a SiDi128 that has a broken video DAC, hence the odd colors

The SiDi128 version of the core has halve the memory cache than the MiSTer one. Some of the artifacts must be coming from that too.

The MiSTer boots up but it’s unstable, probably due to SDRAM noise. I am exploring that next.

It took a long time to find that compiler issue, which is present in modern versions too. Not sure how to report this to Intel, or whether they will try to fix it anyway…

interesting could you give more details about what simplification the compiler was doing wrong?

A system verilog packed type was not handled correctly.

Is this 1:1 with the PCB or it's using "emulation shenanigans"?

It aims to be but at this development stage it still isn’t. As you can see it still is a bit of a graphic mess! Work in progress.

@PixelCNinja 👀

Esperança é a última que morre, esperamos que ela não morra.

Yesss!

Eres un master del universo tio 🙏

King.

Amazing!!! It’s been 84 years, but the jewel is in sight.

Oooo yeah! Nice one jotego

3s elitist will probably still find a way to say the future finished product is unacceptable for tournament play. If it ain't soft Japanese cabs & boards they don't play...minus superguns.

That's a neat little 4:3 LCD

@josembarroso Awesome work.

Habemos Core! Huge news. Jotego! You are great!