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in-progress feature for showing return currents for DDR traces in tscircuit This video shows a ground pour void near the processor's dogboning which causes the return current to take a long path (this is bad!)
26,849 Aufrufe • vor 21 Tagen •via X (Twitter)
33 Kommentare

Nice work! Still building on palace? Note though that signal pins don't have a single dedicated return path pad. The return current will flow through the closest/lowest impedance power pin in the vicinity. Same is true if you are using a power plane as return current reference only that the closest/lowest impedance stitching or decoupling capacitor will carry the return current.

Yes we are doing a LOT with palace, and many of the results I have shown are from palace. I appreciate that, we are making a lot of progress thanks to that suggestion

this should be a hyperparam in the autorouter

Yep!!!!

nice!

What's the frequency and color mapping btw? The current looks very spread out, looks like a lower bandwidth signal?

A bit ashamed to say that this is very imprecise model/heuristic, I'm doing a balancing act right now to try to get the visualizer working prior to validating the results

factorio pollution

That’s a really cool visualization.

I cannot wait for Steve to have this. So useful

It's not currents. It is fields.

Now this looks helpful!

wish i had this in university

my dude is playing factorio with a whole company

ok, this is super cool

Does it dogbone bc it’s like a meniscus ?

flagging that void before fab saves a whole respin tbh

I love how quickly you're iterating in general, and also on community feedback. What are the blockers for current analysis of all kinds, i.e. DC drop, power distribution. It would be awesome to design complex BGA PDNs using tools like this.

This is bad stackup design. It does not need simulation.

simulation confirms that it is a bad stackup, sometimes a first principles analysis is useful because now the AI can know the principle and not need to remember the heuristics

Does this only work for DDR traces? This looks so cool I wanna use it for slow stuff like SPI and I2C (don’t judge me).

You could use it for anything, but it wouldn’t look as interesting because the signal path wouldn’t influence the return current as strongly

Absolutely wild dude

super cool :)

So cool.

What tool is this?

looks like auto-tests for pcb 😅

Really cool

very good and beautiful !

So... it assumes that no current flows through dielectric or other nets than GND?

dogboning voids are a classic pain

"this is bad", sure, but it might still work

That's nice. Can you generate TDR plot?



