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15 Min Post/Perimeter Practice Segment Cross Screens - Low Side Cuts - Defender High - Quick Finish - High Side - Middle Hook - Hi Rip BL - Low Sweep BL - Low Sweep BL Spin Mid - Front Pivot Mid Drive Spin BL - Jab N Go Middle...

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Nick Jones

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23,372 görüntüleme • 1 yıl önce •via X (Twitter)

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Monday Frontcourt Work w/ @Tyfrm315 , Dylan Deluca Jeremiah Jones Franklin - Putbacks - 2nd Jumps, Outside Pivots - Face-up Work Block to Block Posts Jab, Quick Rips - BL Jab, Quick Rips w/Spin Middle Roll vs Switch Seals - Inside Foot Jab, Quick Rips w/Half Spin Jab, Quick Rips w/Spin Step Thru Jab, Quick Rips w/Half Spin Step Thru Post, Throw n Repost Deeper Jab N Go Middle - Off Two Jab N Go Middle - Quick Spin BL - Jab Raise Elbow Js - Pops - Catch to Shoot Rip COD, Mid Drive, SB BL Rip COD/Lane Drive, SB Mid Jab N Go/Mid-COD-Half Spin Finish ( Ambassador Christian School - Boys Basketball 🟣⚪️🟣
11:29

Monday Frontcourt Work w/ @Tyfrm315 , Dylan Deluca Jeremiah Jones Franklin - Putbacks - 2nd Jumps, Outside Pivots - Face-up Work Block to Block Posts Jab, Quick Rips - BL Jab, Quick Rips w/Spin Middle Roll vs Switch Seals - Inside Foot Jab, Quick Rips w/Half Spin Jab, Quick Rips w/Spin Step Thru Jab, Quick Rips w/Half Spin Step Thru Post, Throw n Repost Deeper Jab N Go Middle - Off Two Jab N Go Middle - Quick Spin BL - Jab Raise Elbow Js - Pops - Catch to Shoot Rip COD, Mid Drive, SB BL Rip COD/Lane Drive, SB Mid Jab N Go/Mid-COD-Half Spin Finish ( Ambassador Christian School - Boys Basketball 🟣⚪️🟣

Nick Jones

24,162 görüntüleme • 1 yıl önce

Early Practice Post/Perimeter Shot Creation, Shot Making when driving angles are cut off. Can you still get to you scoring spots and convert? Corner Spot Ups - Attacking Middle Gaps - 1 Foot Finishes - 2 Foot Finishes - 2 Foot Fade - Rip, COD, Downhill Finish - Rip Spin BL J - Rip, COD, Counter Middle - 2 Foot Fade - Rip, COD, Counter Btwn/Cross - Step Back - Rip, COD, Counter Spin BL J JD Bowden Logan Johnson @Judahking2026 Jeremiah Jones Franklin Ambassador Christian School - Boys Basketball 🟣⚪️🟣
9:26

Early Practice Post/Perimeter Shot Creation, Shot Making when driving angles are cut off. Can you still get to you scoring spots and convert? Corner Spot Ups - Attacking Middle Gaps - 1 Foot Finishes - 2 Foot Finishes - 2 Foot Fade - Rip, COD, Downhill Finish - Rip Spin BL J - Rip, COD, Counter Middle - 2 Foot Fade - Rip, COD, Counter Btwn/Cross - Step Back - Rip, COD, Counter Spin BL J JD Bowden Logan Johnson @Judahking2026 Jeremiah Jones Franklin Ambassador Christian School - Boys Basketball 🟣⚪️🟣

Nick Jones

57,310 görüntüleme • 1 yıl önce

Tuesday Work - @Tyfrm315 Dunker’s Spot - Quick Finish, Outside Hand - Closeoff to Spin - Show N Go Opposite Post to Relo Up the Lane - Quick Finish - 1 DBL Spin Back to Basket - 1 DBL Gather Hook - 2 DBL Spin Back - Step Thru Mid/Baseline - 1 DBL Gather J Side Ballscreen/Step Up Slips - Catch & Finish - Pivot & Finish - Spin Back Finish - Short Roll Spin Finish - Short Roll Half Spin Hook
6:13

Tuesday Work - @Tyfrm315 Dunker’s Spot - Quick Finish, Outside Hand - Closeoff to Spin - Show N Go Opposite Post to Relo Up the Lane - Quick Finish - 1 DBL Spin Back to Basket - 1 DBL Gather Hook - 2 DBL Spin Back - Step Thru Mid/Baseline - 1 DBL Gather J Side Ballscreen/Step Up Slips - Catch & Finish - Pivot & Finish - Spin Back Finish - Short Roll Spin Finish - Short Roll Half Spin Hook

Nick Jones

10,426 görüntüleme • 1 yıl önce

Small Group Guard Skill Work teeshon smith rj_moore2027 Judah King Jeremiah Jones Franklin Post Seals (Wing Cuts, Cross Screens) - Drop Step - Hook - 2 DBL Spin Back Drive & Kick Shooting - Rip PUJs - Jab PUJs - C&S 3s - Shot Fake 3s - Trans 3
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Small Group Guard Skill Work teeshon smith rj_moore2027 Judah King Jeremiah Jones Franklin Post Seals (Wing Cuts, Cross Screens) - Drop Step - Hook - 2 DBL Spin Back Drive & Kick Shooting - Rip PUJs - Jab PUJs - C&S 3s - Shot Fake 3s - Trans 3

Nick Jones

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60 Min Small Group Work - @Tyfrm315 Dylan Deluca Jeremiah Jones Franklin @Judahking2026 Logan Johnson JD Bowden - Houston Passing (Popping to Catch/Quick Reversals) - OKC Passing (Attacking Gaps/Paint Touches) L Cut to Rips - 1 DBL - 2 Foot Bully - Decel Euro Ballscreen Gauntlet - (Guards Fighting Over Top - Multiple Efforts) 2 Man Work - Flip Action - Roll Finish - Reject Drive - Roll Spin - Middle Drive - Pop Rip Spin Touch - Flip PUJ - Pop 3 - Relo 3 Ambassador Christian School - Boys Basketball 🟣⚪️🟣
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60 Min Small Group Work - @Tyfrm315 Dylan Deluca Jeremiah Jones Franklin @Judahking2026 Logan Johnson JD Bowden - Houston Passing (Popping to Catch/Quick Reversals) - OKC Passing (Attacking Gaps/Paint Touches) L Cut to Rips - 1 DBL - 2 Foot Bully - Decel Euro Ballscreen Gauntlet - (Guards Fighting Over Top - Multiple Efforts) 2 Man Work - Flip Action - Roll Finish - Reject Drive - Roll Spin - Middle Drive - Pop Rip Spin Touch - Flip PUJ - Pop 3 - Relo 3 Ambassador Christian School - Boys Basketball 🟣⚪️🟣

Nick Jones

36,814 görüntüleme • 1 yıl önce

Thursday Vitamins - Off Ball Corner Scoring Reads 6’8 Elijah Strong - South Carolina 6’6 Sir Mohammed - Notre Dame 6’5 Trey Horton - UTEP Focus on forceful middle gap attacks, staying away from Baseline help. Layups, Free Throws, Easy Pullups. You can be efficient and impactful without being on the ball. 2 DBL Attacks - Outside/Outside Finish - Spin - Euro - PUJs - Spin Jumper - Rip to Post, Middle Turn J - Rip to Post, BL Turn J - 1 DBL COD Hesi PUJ Corner 3s - Spot - Shot Fake, Top Side, Side Step - 1 DBL Hesi PU3 - Drift Off Penetration
11:32

Thursday Vitamins - Off Ball Corner Scoring Reads 6’8 Elijah Strong - South Carolina 6’6 Sir Mohammed - Notre Dame 6’5 Trey Horton - UTEP Focus on forceful middle gap attacks, staying away from Baseline help. Layups, Free Throws, Easy Pullups. You can be efficient and impactful without being on the ball. 2 DBL Attacks - Outside/Outside Finish - Spin - Euro - PUJs - Spin Jumper - Rip to Post, Middle Turn J - Rip to Post, BL Turn J - 1 DBL COD Hesi PUJ Corner 3s - Spot - Shot Fake, Top Side, Side Step - 1 DBL Hesi PU3 - Drift Off Penetration

Nick Jones

12,479 görüntüleme • 1 yıl önce

RHP Patrick Forbes (Louisville Baseball) is an intriguing college arm to keep close tabs on this spring. Last year was Forbes' first focusing solely on pitching, and across 29 innings (12 appearances, 4 starts) he worked a 3.72 ERA with 32 Ks to 15 BB. Proceeded to have a great summer circuit that was split between Team USA and the Cape. On the Cape, Forbes was excellent and pitched his way to a 3.29 ERA with 22 Ks to 6 BB in 13.2 innings. Forbes has a strong, athletic build at 6-foot-3 and 215-pounds. Physicality throughout, some length in his lower-half. Compact, explosive delivery with a short, whippy arm stroke and plenty of arm speed. Attacks from a low-three quarter slot, ultra-high leg lift and really drives his back side through. Moves really well on the mound, high-level athlete. Relies heavily on his mid-90s fastball that he threw 77% of the time last spring. Sat 93-95 and topped out at 97, has been up to 98 this fall. Plenty of life through the zone with some ride in the top 1/3. Also plays well in the bottom 1/3. High-spin pitch that last year averaged North of 2,500 RPMs. Explodes out of his ~5'3" release height. Kind of a dead zone profile, but spin/release traits help compensate for it a little bit. Key is just staying out of the middle. 25% miss rate last year, good number especially given the usage. Supplements his FB with a high-70s-to-low-80s SL. Tight, two-plane tilt. Still gaining feel for the pitch and the shape can be a little inconsistent at times, but it will really flash. Will sometimes take on a true sweeper look that looks like a real weapon. Also throws a high-70s-to-low-80s CB. The shape will blend with his SL at times, but it will flash depth with sharp, downward bite. SL is definitely the better of the two - 41% miss rate last spring. Forbes rounds out his arsenal with a high-80s-to-low-90s power CH. Hardly ever uses it (5% usage in '24) but at times it showed serious late fade to the arm side with some tumble. Command can waver, but it's gotten better year-over-year and took another step forward this summer. Low mileage arm with plenty of upside. Bulldog mentality on the mound, checks a ton of boxes between his "now" stuff and athleticism. Certainly some reliever risk, but there's easy stuff to clean up across the board that will help maximize his chance to start. Day 1 upside this July.
0:36

RHP Patrick Forbes (Louisville Baseball) is an intriguing college arm to keep close tabs on this spring. Last year was Forbes' first focusing solely on pitching, and across 29 innings (12 appearances, 4 starts) he worked a 3.72 ERA with 32 Ks to 15 BB. Proceeded to have a great summer circuit that was split between Team USA and the Cape. On the Cape, Forbes was excellent and pitched his way to a 3.29 ERA with 22 Ks to 6 BB in 13.2 innings. Forbes has a strong, athletic build at 6-foot-3 and 215-pounds. Physicality throughout, some length in his lower-half. Compact, explosive delivery with a short, whippy arm stroke and plenty of arm speed. Attacks from a low-three quarter slot, ultra-high leg lift and really drives his back side through. Moves really well on the mound, high-level athlete. Relies heavily on his mid-90s fastball that he threw 77% of the time last spring. Sat 93-95 and topped out at 97, has been up to 98 this fall. Plenty of life through the zone with some ride in the top 1/3. Also plays well in the bottom 1/3. High-spin pitch that last year averaged North of 2,500 RPMs. Explodes out of his ~5'3" release height. Kind of a dead zone profile, but spin/release traits help compensate for it a little bit. Key is just staying out of the middle. 25% miss rate last year, good number especially given the usage. Supplements his FB with a high-70s-to-low-80s SL. Tight, two-plane tilt. Still gaining feel for the pitch and the shape can be a little inconsistent at times, but it will really flash. Will sometimes take on a true sweeper look that looks like a real weapon. Also throws a high-70s-to-low-80s CB. The shape will blend with his SL at times, but it will flash depth with sharp, downward bite. SL is definitely the better of the two - 41% miss rate last spring. Forbes rounds out his arsenal with a high-80s-to-low-90s power CH. Hardly ever uses it (5% usage in '24) but at times it showed serious late fade to the arm side with some tumble. Command can waver, but it's gotten better year-over-year and took another step forward this summer. Low mileage arm with plenty of upside. Bulldog mentality on the mound, checks a ton of boxes between his "now" stuff and athleticism. Certainly some reliever risk, but there's easy stuff to clean up across the board that will help maximize his chance to start. Day 1 upside this July.

Peter Flaherty III

20,137 görüntüleme • 1 yıl önce

RHP Coleman Crow Acquired: 28th round selection by the Angels in 2019 draft, eventually traded to the Brewers from the Mets in exchange for Adrian Hauser & Tyrone Taylor Measurables: 6’0”, 175 lbs, 23 years old Cliff Notes: Crow has been dealt twice now in trades for proven MLB talent. Never pitching in the Mets’ system due to a Tommy John surgery, he saw some success in the Angel’s system. Pitching at AA in 2022 and starting there again in 2023, Crow posted a 4.38 ERA across 152 innings (28 games). His 24.8% strikeout rate and 6.4% walk rate in AA reflect his strengths well. He pounds the strike zone and controls his pitches. Crow has a low-90’s 4-seamer that he releases from his low slot. From that same slot, he throws his best offering - a horizontal sweeping, vertical dropping, high-spin curveball that sits below 80-mph. Additionally, Crow throws a mid-80’s slider with horizontal sweep and rarely throws his fading change-up. Crow’s ability to sneaky release and ability to control sets him up to one day be able to fill out a rotation or be a long reliever. Crow was a 28th rounder in the 2019 draft, but was paid an approximately 5th round slot bonus that the Angels dumped on him. With the 2020 season lost to COVID, Crow debuted in 2020 getting his feet wet at Single A and the Arizona Fall League. He followed that up with a strong 2022 performance in AA Rocket City and continued there to start 2023, prior to an elbow injury. In AA, he had a low 4’s ERA, as noted above. Averaging over a strikeout per inning, he averaged just over two walks per game. Opponents hit Crow with about a .240 opponent batting average, leading to a 1.204 WHIP. Nearly 50% of contact induced was a ground ball with under 20% being line drives. So far in his career, Crow has done a good job eluding hard contact. Crow throws a fastball that sits low-90’s with a flat approach that fools hitters in the top of the zone. His curve sits below 80-mph and posted elite spin and movement in AA (notably with a tacked ball). The curve has vertical dive, but more importantly elite horizontal sweep across the plate. He throws a faster, mid-80’s slider that also has nearly a foot of sweep. His fourth, and sparsely used, offering is a change-up that tails arm side. Crow throws a strike nearly three quarters of his offerings with solid command, which allows him to miss barrels. Shut down from an inflamed elbow since April ‘23, he underwent Tommy John surgery in summer of 2023. His return from Tommy John will be worth a watch. Hopefully he maintains his command and progress made to this point in his career so that he can resume his career path. Crow was on a path to the Big Leagues as a possible back-end starter or long reliever, so stay tuned for his return to the mound. Profile by Cole Roepke
1:24

RHP Coleman Crow Acquired: 28th round selection by the Angels in 2019 draft, eventually traded to the Brewers from the Mets in exchange for Adrian Hauser & Tyrone Taylor Measurables: 6’0”, 175 lbs, 23 years old Cliff Notes: Crow has been dealt twice now in trades for proven MLB talent. Never pitching in the Mets’ system due to a Tommy John surgery, he saw some success in the Angel’s system. Pitching at AA in 2022 and starting there again in 2023, Crow posted a 4.38 ERA across 152 innings (28 games). His 24.8% strikeout rate and 6.4% walk rate in AA reflect his strengths well. He pounds the strike zone and controls his pitches. Crow has a low-90’s 4-seamer that he releases from his low slot. From that same slot, he throws his best offering - a horizontal sweeping, vertical dropping, high-spin curveball that sits below 80-mph. Additionally, Crow throws a mid-80’s slider with horizontal sweep and rarely throws his fading change-up. Crow’s ability to sneaky release and ability to control sets him up to one day be able to fill out a rotation or be a long reliever. Crow was a 28th rounder in the 2019 draft, but was paid an approximately 5th round slot bonus that the Angels dumped on him. With the 2020 season lost to COVID, Crow debuted in 2020 getting his feet wet at Single A and the Arizona Fall League. He followed that up with a strong 2022 performance in AA Rocket City and continued there to start 2023, prior to an elbow injury. In AA, he had a low 4’s ERA, as noted above. Averaging over a strikeout per inning, he averaged just over two walks per game. Opponents hit Crow with about a .240 opponent batting average, leading to a 1.204 WHIP. Nearly 50% of contact induced was a ground ball with under 20% being line drives. So far in his career, Crow has done a good job eluding hard contact. Crow throws a fastball that sits low-90’s with a flat approach that fools hitters in the top of the zone. His curve sits below 80-mph and posted elite spin and movement in AA (notably with a tacked ball). The curve has vertical dive, but more importantly elite horizontal sweep across the plate. He throws a faster, mid-80’s slider that also has nearly a foot of sweep. His fourth, and sparsely used, offering is a change-up that tails arm side. Crow throws a strike nearly three quarters of his offerings with solid command, which allows him to miss barrels. Shut down from an inflamed elbow since April ‘23, he underwent Tommy John surgery in summer of 2023. His return from Tommy John will be worth a watch. Hopefully he maintains his command and progress made to this point in his career so that he can resume his career path. Crow was on a path to the Big Leagues as a possible back-end starter or long reliever, so stay tuned for his return to the mound. Profile by Cole Roepke

The Brew Crew Scoop

19,909 görüntüleme • 2 yıl önce

RHP Matt Scott (Stanford Baseball) is one of the premier college arms in this year's Draft. After a solid Freshman season that was split between the bullpen and the rotation, Scott this year anchored the Stanford rotation and collected a career-high 103 strikeouts against 36 walks across 80 innings. Earned a Team USA invite for the second straight summer. Scott has an XL, workhorse frame at 6-foot-7 and 247-pounds with plenty of strength and physicality throughout. Quiet, "checkpoint-like" delivery. Small side step towards 1B side, gathers himself and breaks into the rest of his operation. Attacks from a high-three quarter slot. Low effort, does a nice job of staying connected and in-sync for someone of his stature. FB sits in the 93-96 range, but will routinely touch 97/98. Tons of carry through the zone, averaged 22.5" of IVB last year. At its best when located in the top-1/2 of the zone, which is also where it generates most of its whiffs. Just needs to stay out of the middle. Threw it 62% of the time and generated a pretty impressive miss rate of 26%, though I think it can become even more effective if he's able to hone in on his command of it. 55 pitch right now, eventual 60 if some of the low hanging fruit is cleaned up. Supplements his FB with a mid-to-upper-80s gyro SL. I actually think Scott's feel for the SL is on par, if not better, than his feel for the heater. Effective against both right and lefthanded hitters. True, hard gyro look against LHH. Will flash more two-plane tilt against RHH with some sharpness to it. Another 55 pitch that last year had a 40% miss rate. Scott needs to up the usage on his split-change. Threw it just 6% of the time last year and I think it's his best secondary pitch. Legit weapon against LHH. Averaged nearly 12 MPH off his FB and he does an excellent job of killing spin on it; averaged 866 RPMs last season. Essentially falls off a table as it approaches the plate. Serious tumbling life with a bit of arm side fade. 48% miss across a limited sample in '24, I'd give it a 60. Command and control are both average, if not a tick above. Little-to-no reliever risk. Really like the body and stuff. Projects to be one of the first few college arms off the board this July and is a potential first-rounder.
1:18

RHP Matt Scott (Stanford Baseball) is one of the premier college arms in this year's Draft. After a solid Freshman season that was split between the bullpen and the rotation, Scott this year anchored the Stanford rotation and collected a career-high 103 strikeouts against 36 walks across 80 innings. Earned a Team USA invite for the second straight summer. Scott has an XL, workhorse frame at 6-foot-7 and 247-pounds with plenty of strength and physicality throughout. Quiet, "checkpoint-like" delivery. Small side step towards 1B side, gathers himself and breaks into the rest of his operation. Attacks from a high-three quarter slot. Low effort, does a nice job of staying connected and in-sync for someone of his stature. FB sits in the 93-96 range, but will routinely touch 97/98. Tons of carry through the zone, averaged 22.5" of IVB last year. At its best when located in the top-1/2 of the zone, which is also where it generates most of its whiffs. Just needs to stay out of the middle. Threw it 62% of the time and generated a pretty impressive miss rate of 26%, though I think it can become even more effective if he's able to hone in on his command of it. 55 pitch right now, eventual 60 if some of the low hanging fruit is cleaned up. Supplements his FB with a mid-to-upper-80s gyro SL. I actually think Scott's feel for the SL is on par, if not better, than his feel for the heater. Effective against both right and lefthanded hitters. True, hard gyro look against LHH. Will flash more two-plane tilt against RHH with some sharpness to it. Another 55 pitch that last year had a 40% miss rate. Scott needs to up the usage on his split-change. Threw it just 6% of the time last year and I think it's his best secondary pitch. Legit weapon against LHH. Averaged nearly 12 MPH off his FB and he does an excellent job of killing spin on it; averaged 866 RPMs last season. Essentially falls off a table as it approaches the plate. Serious tumbling life with a bit of arm side fade. 48% miss across a limited sample in '24, I'd give it a 60. Command and control are both average, if not a tick above. Little-to-no reliever risk. Really like the body and stuff. Projects to be one of the first few college arms off the board this July and is a potential first-rounder.

Peter Flaherty III

23,661 görüntüleme • 1 yıl önce

1B Tanner Thach (UNCW Baseball) is another college bat to keep close tabs on this season. Thach was drafted by the Giants in the 18th round of the 2022 draft but decided to honor his commitment to the Seahawks. Thach made a significant impact in his first year on campus and posted a .290/.356/.544 slash line with 11 2B, 15 HR—a UNCW single-season freshman record—and 68 RBIs. He outdid himself in 2024 and hit .324/.406/.700 with 11 2B, a UNCW single-season record 27 HR and 75 RBIs in 61 games. Thach’s production didn’t end there, though, as he was named a Cape League all-star, hitting .275/.367/.493 with 6 doubles, 8 HR and 25 RBIs. Thach has a strong, physical build at 6’4” and 220-lbs. He has a crouched stance in the box with an open front side and a medium-high handset. It’s a bit of a noisy load in which he drops and drifts his hands, but Thach does possess plenty of bat speed. He has a steep, uphill swing path, and it’s a violent operation that is geared towards getting the ball up in the air and doing damage. However, it can get long at times. Thach’s carrying tool is undoubtedly his immense power. He has established a now-lengthy track record of power production with both metal and wood, and he has zero issue tapping into it on a game-to-game basis. Thach has home run power to all fields, though his highest quality of contact comes to the pull side. He gets the ball up in the air on a consistent basis, and when he catches the baseball on the sweet spot, it flies. Thach posted maximum exit velocities during the spring and summer of 113.5 mph and 103.1 mph, respectively. At the start of the summer, he would sometimes unnecessarily sell out to get to his power which caused him to top-spin line drives to the pull side, but as the season progressed he was able to break that habit. Thach has plus in-game power to all fields. The biggest key going forward for Thach is for him to continue to make enough contact to get to his power on a regular basis. His bat-to-ball skills are fringy, though he did post a 90% in-zone contact rate against all fastballs. Like a lot of hitters, the root of Thach’s contact struggles are secondary offerings. He’ll have difficulty at times picking up spin out of the hand which leads to both miss and chase. Thach will also tend to whiff and chase against heaters that are either elevated or on the outer-half of the plate. However, he does handle velocity well and last season he hit .533/.588/1.033 against all fastballs 92+. While Thach feasts on righthanded pitching, he hit just .246/.321/.551 last season against lefties. Thach’s power is tremendous, but he’ll need to add a coat or two of polish to his hit-ability as he transitions into professional baseball. First base isn’t the flashiest defensive profile, but Thach moves well around the bag and is a strong athlete at the position. He’s not afraid to range into the four-hole and he is a reassuring anchor on the right side of the infield. Thach has an advanced baseball sense, a trait that shines on a game-to-game basis. While he won’t pitch professionally, expect Thach to log some innings this spring for UNCW. His fastball tops out in the low 90s and flashes some hop in the top of the zone, but he’ll also mix in a mid-70s curveball and a low-80s changeup. The cherry on top with Thach is his makeup, both on and off the field. It’s impossible to stick a grade on it because it’s a 90 on the 20-80 scale. Would have him as a 2nd-early 3rd round type this July. (🎥: UNCW Baseball, Cotuit Kettleers)
0:36

1B Tanner Thach (UNCW Baseball) is another college bat to keep close tabs on this season. Thach was drafted by the Giants in the 18th round of the 2022 draft but decided to honor his commitment to the Seahawks. Thach made a significant impact in his first year on campus and posted a .290/.356/.544 slash line with 11 2B, 15 HR—a UNCW single-season freshman record—and 68 RBIs. He outdid himself in 2024 and hit .324/.406/.700 with 11 2B, a UNCW single-season record 27 HR and 75 RBIs in 61 games. Thach’s production didn’t end there, though, as he was named a Cape League all-star, hitting .275/.367/.493 with 6 doubles, 8 HR and 25 RBIs. Thach has a strong, physical build at 6’4” and 220-lbs. He has a crouched stance in the box with an open front side and a medium-high handset. It’s a bit of a noisy load in which he drops and drifts his hands, but Thach does possess plenty of bat speed. He has a steep, uphill swing path, and it’s a violent operation that is geared towards getting the ball up in the air and doing damage. However, it can get long at times. Thach’s carrying tool is undoubtedly his immense power. He has established a now-lengthy track record of power production with both metal and wood, and he has zero issue tapping into it on a game-to-game basis. Thach has home run power to all fields, though his highest quality of contact comes to the pull side. He gets the ball up in the air on a consistent basis, and when he catches the baseball on the sweet spot, it flies. Thach posted maximum exit velocities during the spring and summer of 113.5 mph and 103.1 mph, respectively. At the start of the summer, he would sometimes unnecessarily sell out to get to his power which caused him to top-spin line drives to the pull side, but as the season progressed he was able to break that habit. Thach has plus in-game power to all fields. The biggest key going forward for Thach is for him to continue to make enough contact to get to his power on a regular basis. His bat-to-ball skills are fringy, though he did post a 90% in-zone contact rate against all fastballs. Like a lot of hitters, the root of Thach’s contact struggles are secondary offerings. He’ll have difficulty at times picking up spin out of the hand which leads to both miss and chase. Thach will also tend to whiff and chase against heaters that are either elevated or on the outer-half of the plate. However, he does handle velocity well and last season he hit .533/.588/1.033 against all fastballs 92+. While Thach feasts on righthanded pitching, he hit just .246/.321/.551 last season against lefties. Thach’s power is tremendous, but he’ll need to add a coat or two of polish to his hit-ability as he transitions into professional baseball. First base isn’t the flashiest defensive profile, but Thach moves well around the bag and is a strong athlete at the position. He’s not afraid to range into the four-hole and he is a reassuring anchor on the right side of the infield. Thach has an advanced baseball sense, a trait that shines on a game-to-game basis. While he won’t pitch professionally, expect Thach to log some innings this spring for UNCW. His fastball tops out in the low 90s and flashes some hop in the top of the zone, but he’ll also mix in a mid-70s curveball and a low-80s changeup. The cherry on top with Thach is his makeup, both on and off the field. It’s impossible to stick a grade on it because it’s a 90 on the 20-80 scale. Would have him as a 2nd-early 3rd round type this July. (🎥: UNCW Baseball, Cotuit Kettleers)

Peter Flaherty III

42,659 görüntüleme • 1 yıl önce

Turn the volume up and let the colors take over. A little chaos, a lot of energy, and a soundtrack made for endless summer days. 💖⚡ Made on FlovaAI using Sonu and Seedance 2.0 #Flovaai #Flovacpp PROMPT: Generate a continuous 1-minute high-budget K-pop-inspired music video synchronized to the lyrics below. The video should feel like a real summer comeback with constant momentum, vibrant colors, cinematic visuals, and powerful synchronized choreography. Every beat should introduce dynamic dance movements, new camera angles, formation changes, or visual effects. The pacing should be fast, energetic, stylish, and addictive with no slow walking sequences or static shots. Every frame should feel alive. Character (Must Remain Identical Throughout) Caden, 22-year-old male, 6'0" (183 cm), lean athletic build, fair skin, expressive brown eyes, clean-shaven, short brown hair styled in a voluminous side-swept quiff, youthful, confident, playful, charismatic smile. Outfit (Never Changes) Burgundy varsity jacket with white sleeves and striped ribbed cuffs and waistband Oversized untucked white button-up shirt Slim black necktie Washed charcoal oversized wide-leg jeans Burgundy Converse-style high-top sneakers with white toe cap and white laces Matte black over-ear headphones resting around his neck Thin silver chain necklace Silver rings 0:00–0:15 | Intro Lyrics Sunlight dripping on a cherry sky, Bubble dreams and we're feeling fly. One more spark, let the colors drop, Heartbeat fizz, never wanna stop. Scene The music video opens with an explosive introduction inside a vibrant pastel "Soda City." Caden immediately takes center stage with eight synchronized backup dancers dressed in coordinated colorful streetwear. They perform sharp, energetic choreography with fast footwork, synchronized arm movements, expressive facial performance, and constantly changing dance formations. The camera rapidly alternates between dramatic close-ups, sweeping crane shots, whip pans, rotating 360-degree movements, crash zooms, low-angle hero shots, aerial drone reveals, and smooth gimbal tracking. Giant floating bubbles, oversized cherries, colorful fountains, confetti cannons, pastel cafés, glowing signs, and sparkling sunlight fill the environment. Every lyric is matched with dynamic choreography, playful expressions, colorful particle effects, and high-energy movement. 0:15–0:30 | Pre-Chorus Lyrics Blue, pink, green, paint the air, Every little moment tastes unfair. Spin it up, let the whole world glow, Catch the rush and just let it flow. Scene The choreography becomes even more intricate as Caden and the dancers move through a colorful city plaza filled with neon cafés, giant soda bottles, bubble fountains, amusement rides, roller skaters, dancing crowds, colorful murals, and glowing street decorations. Every few beats the dancers transition into new formations. Colored powder bursts, sparkling particles, bubbles, ribbons, and confetti explode in perfect synchronization with the music. Camera movement remains constant with overhead drone shots, dynamic steadicam tracking, dolly movements, whip transitions, rotating camera moves, and stylish close-ups that emphasize dance performance and fashion. 0:30–0:45 | Chorus Lyrics Pop-pop, light it up, Sugar stars in a paper cup. Fizz-fizz, feel the beat, Dancing down every neon street. Pop-pop, don't let go, We're the colors everybody knows. Scene The chorus explodes into a massive K-pop performance sequence. Giant LED displays, colorful lasers, fireworks, sparkling stars, floating balloons, glowing bubbles, confetti storms, and synchronized lighting effects transform the city into a festival. Caden leads powerful choreography with continuous formation changes while dancers interact with colorful props and playful stage elements. Camera work becomes even faster with handheld performance shots, sweeping orbits, overhead reveals, dramatic push-ins, stylish slow-motion accents on key dance moves, and wide cinematic shots showcasing the full choreography. Every beat feels designed for dance performance with no pauses in energy. 0:45–1:00 | Outro Lyrics One more smile, one more flash, Living like a summer splash. When the music never stops, We're forever in the pop. Scene The final section becomes the biggest celebration yet. Caden and the dancers perform the signature chorus choreography in the middle of a glowing festival square surrounded by cheering crowds, giant fountains, colorful lights, fireworks, bubbles, confetti, oversized balloons, amusement rides, and vibrant summer decorations. The choreography reaches its peak with synchronized jumps, spins, partner interactions, and dynamic ending formations. The camera alternates between intimate close-ups, dramatic low-angle shots, aerial drone views, and wide cinematic reveals before ending on a powerful hero pose as confetti rains from the sky and the entire city glows beneath colorful lights. Overall Visual Direction High-budget K-pop summer comeback music video, luxury fashion campaign aesthetics, synchronized choreography, professional backup dancers, energetic dance performance, expressive facial acting, polished styling, colorful festival atmosphere, bold pastel palette, cherry red, bubblegum pink, lemon yellow, mint green, electric blue, glossy commercial lighting, cinematic anamorphic lenses, fast-paced editing, dynamic camera movement, whip pans, crash zooms, crane shots, aerial drone shots, smooth gimbal tracking, rotating camera movements, seamless transitions, sparkling particle effects, colorful bubbles, confetti, fireworks, vibrant cityscapes, amusement park atmosphere, stylish street fashion, premium commercial quality, addictive choreography, playful youthful energy, polished K-pop comeback aesthetic, constant movement, no static shots, no walking sequences, every second filled with choreography, camera motion, colorful spectacle, and infectious pop energy. 🔥 Final Line (Very Important) Prioritize synchronized choreography, expressive dance performance, dynamic camera movement, fast-paced editing, and continuous visual excitement over cinematic slow moments. Every beat should feel performance-driven, colorful, energetic, and designed like a high-budget K-pop music video with nonstop momentum from beginning to end.
0:55

Turn the volume up and let the colors take over. A little chaos, a lot of energy, and a soundtrack made for endless summer days. 💖⚡ Made on FlovaAI using Sonu and Seedance 2.0 #Flovaai #Flovacpp PROMPT: Generate a continuous 1-minute high-budget K-pop-inspired music video synchronized to the lyrics below. The video should feel like a real summer comeback with constant momentum, vibrant colors, cinematic visuals, and powerful synchronized choreography. Every beat should introduce dynamic dance movements, new camera angles, formation changes, or visual effects. The pacing should be fast, energetic, stylish, and addictive with no slow walking sequences or static shots. Every frame should feel alive. Character (Must Remain Identical Throughout) Caden, 22-year-old male, 6'0" (183 cm), lean athletic build, fair skin, expressive brown eyes, clean-shaven, short brown hair styled in a voluminous side-swept quiff, youthful, confident, playful, charismatic smile. Outfit (Never Changes) Burgundy varsity jacket with white sleeves and striped ribbed cuffs and waistband Oversized untucked white button-up shirt Slim black necktie Washed charcoal oversized wide-leg jeans Burgundy Converse-style high-top sneakers with white toe cap and white laces Matte black over-ear headphones resting around his neck Thin silver chain necklace Silver rings 0:00–0:15 | Intro Lyrics Sunlight dripping on a cherry sky, Bubble dreams and we're feeling fly. One more spark, let the colors drop, Heartbeat fizz, never wanna stop. Scene The music video opens with an explosive introduction inside a vibrant pastel "Soda City." Caden immediately takes center stage with eight synchronized backup dancers dressed in coordinated colorful streetwear. They perform sharp, energetic choreography with fast footwork, synchronized arm movements, expressive facial performance, and constantly changing dance formations. The camera rapidly alternates between dramatic close-ups, sweeping crane shots, whip pans, rotating 360-degree movements, crash zooms, low-angle hero shots, aerial drone reveals, and smooth gimbal tracking. Giant floating bubbles, oversized cherries, colorful fountains, confetti cannons, pastel cafés, glowing signs, and sparkling sunlight fill the environment. Every lyric is matched with dynamic choreography, playful expressions, colorful particle effects, and high-energy movement. 0:15–0:30 | Pre-Chorus Lyrics Blue, pink, green, paint the air, Every little moment tastes unfair. Spin it up, let the whole world glow, Catch the rush and just let it flow. Scene The choreography becomes even more intricate as Caden and the dancers move through a colorful city plaza filled with neon cafés, giant soda bottles, bubble fountains, amusement rides, roller skaters, dancing crowds, colorful murals, and glowing street decorations. Every few beats the dancers transition into new formations. Colored powder bursts, sparkling particles, bubbles, ribbons, and confetti explode in perfect synchronization with the music. Camera movement remains constant with overhead drone shots, dynamic steadicam tracking, dolly movements, whip transitions, rotating camera moves, and stylish close-ups that emphasize dance performance and fashion. 0:30–0:45 | Chorus Lyrics Pop-pop, light it up, Sugar stars in a paper cup. Fizz-fizz, feel the beat, Dancing down every neon street. Pop-pop, don't let go, We're the colors everybody knows. Scene The chorus explodes into a massive K-pop performance sequence. Giant LED displays, colorful lasers, fireworks, sparkling stars, floating balloons, glowing bubbles, confetti storms, and synchronized lighting effects transform the city into a festival. Caden leads powerful choreography with continuous formation changes while dancers interact with colorful props and playful stage elements. Camera work becomes even faster with handheld performance shots, sweeping orbits, overhead reveals, dramatic push-ins, stylish slow-motion accents on key dance moves, and wide cinematic shots showcasing the full choreography. Every beat feels designed for dance performance with no pauses in energy. 0:45–1:00 | Outro Lyrics One more smile, one more flash, Living like a summer splash. When the music never stops, We're forever in the pop. Scene The final section becomes the biggest celebration yet. Caden and the dancers perform the signature chorus choreography in the middle of a glowing festival square surrounded by cheering crowds, giant fountains, colorful lights, fireworks, bubbles, confetti, oversized balloons, amusement rides, and vibrant summer decorations. The choreography reaches its peak with synchronized jumps, spins, partner interactions, and dynamic ending formations. The camera alternates between intimate close-ups, dramatic low-angle shots, aerial drone views, and wide cinematic reveals before ending on a powerful hero pose as confetti rains from the sky and the entire city glows beneath colorful lights. Overall Visual Direction High-budget K-pop summer comeback music video, luxury fashion campaign aesthetics, synchronized choreography, professional backup dancers, energetic dance performance, expressive facial acting, polished styling, colorful festival atmosphere, bold pastel palette, cherry red, bubblegum pink, lemon yellow, mint green, electric blue, glossy commercial lighting, cinematic anamorphic lenses, fast-paced editing, dynamic camera movement, whip pans, crash zooms, crane shots, aerial drone shots, smooth gimbal tracking, rotating camera movements, seamless transitions, sparkling particle effects, colorful bubbles, confetti, fireworks, vibrant cityscapes, amusement park atmosphere, stylish street fashion, premium commercial quality, addictive choreography, playful youthful energy, polished K-pop comeback aesthetic, constant movement, no static shots, no walking sequences, every second filled with choreography, camera motion, colorful spectacle, and infectious pop energy. 🔥 Final Line (Very Important) Prioritize synchronized choreography, expressive dance performance, dynamic camera movement, fast-paced editing, and continuous visual excitement over cinematic slow moments. Every beat should feel performance-driven, colorful, energetic, and designed like a high-budget K-pop music video with nonstop momentum from beginning to end.

Caden Flux

108,506 görüntüleme • 8 gün önce

i'm looking for feedback, thank you here's the full definition of my schematic: import { mkdirSync, writeFileSync } from "node:fs" import path from "node:path" import { defineCircuit, definePart, exportKiCadNetlist, instantiate, net, pin, } from "../../../tools/circuitd/src" const ch32v203f8u6 = definePart({ id: "CH32V203F8U6", kicadSymbol: "tinybee:CH32V203F8U6", footprint: "tinybee:QFN-20_L3.0-W3.0-P0.40-BL-EP1.7", defaultValue: "CH32V203F8U6", datasheet: " description: "144 MHz RISC-V MCU with ADCs, op-amps, advanced timers, and SWD", fields: { "LCSC Part": "C7570477", }, designNotes: [ "Power this MCU from a 3.3 V rail only; do not allow the VDD pin to see more than 3.6 V.", "Place a 100 nF decoupler immediately next to VDD and the QFN ground return, and keep that loop as short as possible.", "Put a small series resistor between PA0 and any off-board throttle or one-wire configuration signal so the MCU pin is not directly exposed at the connector.", "Keep PA13 and PA14 easy to probe and free of hard loads so SWD still works during bring-up and recovery.", "Keep PA8, PA9, PA10, PA7, PB0, and PB1 on the three phase-drive nets, and keep PA6/BKI free for a future fault or protection input.", "If you follow the openwch RISC-V ESC zero-cross scheme, tie PA3 and PA4 back into PA2 externally and reserve PA2 for that shared interrupt net.", "Route back-EMF and op-amp related pins away from phase copper, gate-drive loops, and other fast-switching nodes.", ], pins: { "PA0/WKUP/ADC0": "1", "PA1/ADC1": "2", "PA2/ADC2/OP2O0": "3", "PA3/ADC3/OP1O0": "4", "PA4/ADC4/OP2O1": "5", "PA5/ADC5/OP2N1": "6", "PA7/ADC7/OP2P1/CH1N": "7", "PB0/ADC8/OP1P1/CH2N": "8", "PB1/ADC9/OP1O1/CH3N": "9", "PB10/OP2N0": "10", "PB11/OP1N0": "11", "PB14/OP2P0": "12", "PB15/OP1P0": "13", "PA8/CH1": "14", "PA9/CH2": "15", "PA13/SWD/PA12/UDP": "16", "PA14/SWC/PA11/UDM": "17", "PA10/CH3": "18", VDD: "19", "PA6/ADC6/OP1N1/BKI": "20", GND: "21", }, }) const tlv75533pdqnt = definePart({ id: "TLV75533PDQNT", kicadSymbol: "Regulator_Linear:TLV75533PDBV", footprint: "tinybee:Texas_X2SON-4_1x1mm_P0.65mm", defaultValue: "TLV75533PDQNT", datasheet: " description: "500mA low-dropout fixed 3.3V regulator in 1x1mm X2SON-4", designNotes: [ "Treat +BATT as a 1S Li-ion or LiPo rail only; this regulator has a 5.5 V maximum input rating, so 2S or higher is out of bounds for this graph.", "Place at least 1 uF ceramic directly at IN and at least 1 uF ceramic directly at OUT; do not push those capacitors away from the package.", "Check regulator heating with (VIN - 3.3 V) * load current and add copper area if the dissipation is not comfortably safe.", "Add local input bulk when the battery lead is long or inductive so the LDO input does not absorb line spikes by itself.", "Keep EN tied to a known state at all times; if startup control matters later, break it out deliberately instead of bodging it in.", "The X2SON thermal pad is internally tied to GND; flood it into the local ground copper and do not leave the center pad floating.", ], pins: { OUT: "1", GND: "2", EN: "3", IN: "4", THERMAL_PAD: "5", }, }) const controlHeader = definePart({ id: "CTRL_IN_HEADER_1X01", kicadSymbol: "Connector_Generic:Conn_01x01", footprint: "tinybee:CTRL_PAD_1x01_Micro", defaultValue: "CTRL_IN", description: "1-pin control input wire pad for throttle signal", designNotes: [ "Use this only for the control signal.", "Ground reference is expected to be shared elsewhere in the system when this pad is in use.", "Battery power comes in through the dedicated battery wire holes, not through this control pad.", "PA0 on the CH32 is not a true FT input; treat this header as a 3.3 V logic input unless you deliberately add a real level-conditioning stage.", ], pins: { PIN1: "1", }, }) const motorHeader = definePart({ id: "MOTOR_OUT_HEADER_1X03", kicadSymbol: "Connector_Generic:Conn_01x03", footprint: "tinybee:MOTOR_PADS_1x03_Micro", defaultValue: "MOTOR_OUT", description: "3-pin motor phase wire pad group", designNotes: [ "This is the board edge interface for the three motor phases.", "Use direct wire holes here rather than a bulky 2.54 mm header footprint.", ], pins: { PIN1: "1", PIN2: "2", PIN3: "3", }, }) const programmingHeader = definePart({ id: "PROG_HEADER_1X04", kicadSymbol: "Connector_Generic:Conn_01x04", footprint: "tinybee:PROG_PADS_1x04_Micro", defaultValue: "PROG", description: "4-pin fine-pitch SWD programming header", designNotes: [ "Break out SWDIO, SWCLK, GND, and 3.3 V so the CH32 can be flashed and recovered without bodge wires.", "Keep this header free of extra loading and avoid reusing the SWD pins elsewhere until firmware bring-up is stable.", "Treat the 3.3 V pin here as target reference unless you deliberately design reverse-current-safe back-powering through the regulator path.", ], pins: { PIN1: "1", PIN2: "2", PIN3: "3", PIN4: "4", }, }) const batteryHeader = definePart({ id: "BATT_IN_HEADER_1X02", kicadSymbol: "Connector_Generic:Conn_01x02", footprint: "tinybee:BATT_PADS_1x02_Micro", defaultValue: "BATT_IN", description: "2-pin battery wire pad pair", designNotes: [ "Use this dedicated pair for battery positive and battery negative input.", "Keep the battery loop tight to the bulk capacitors and half-bridge supply entry.", ], pins: { PIN1: "1", PIN2: "2", }, }) const complementaryHalfBridge = definePart({ id: "PMCPB5530X_115", kicadSymbol: "tinybee:PMCPB5530X,115", footprint: "tinybee:DFN2020-6_L2.0-W2.0-P0.65-BL", defaultValue: "PMCPB5530X,115", datasheet: " description: "20 V complementary N/P MOSFET half-bridge in DFN2020-6", fields: { "LCSC Part": "C552747", }, designNotes: [ "Use this complementary half-bridge only on a 1S Li-ion or LiPo rail; do not reuse the direct P-gate pull-down topology above the 1S battery range.", "With +BATT limited to the 1S range, the direct P-gate pull-down swing stays inside the device gate limits and gives usable drive headroom.", "Drive the low-side N-FET gates directly from the 3.3 V timer outputs only in this 1S design; rework the stage before raising the battery voltage.", "Do not skimp on local +BATT bypass; keep real ceramic bulk plus a high-frequency bypass capacitor tight to the half-bridge supply loop.", "Pour the duplicated drain pads into real copper for current and heat spreading; do not neck them down right at the package.", "Keep each gate loop short, tight, and referenced to its own source return to reduce ringing and false turn-on.", "Assume the board copper sets the real current limit; check temperature rise on the actual ESC geometry, not only the datasheet headline current.", ], pins: { LOW_SIDE_SOURCE: "1", LOW_SIDE_GATE: "2", HIGH_SIDE_DRAIN: ["3", "8"], HIGH_SIDE_SOURCE: "4", HIGH_SIDE_GATE: "5", LOW_SIDE_DRAIN: ["6", "7"], }, }) const highSidePullDownBjt = definePart({ id: "BC847BLP_7", kicadSymbol: "Transistor_BJT:Q_NPN_BEC", footprint: "Package_TO_SOT_SMD:SOT-883", defaultValue: "BC847BLP-7", datasheet: " description: "45 V, 100 mA NPN small-signal transistor in SOT-883", designNotes: [ "Use this device only as the helper pull-down for the high-side P-gate nets; do not put motor or supply current through it as a power path element.", "In this topology, keep emitter at GND, collector on the P-gate net, and drive the base through a resistor from the MCU.", "Give the base a defined pulldown so the PMOS high side stays off while the MCU is in reset or high-impedance.", "With a 470R P-gate pull-up on a 1S rail, this transistor sinks about 9 mA at full turn-on, which is still well inside the BC847BLP-7's capability.", "Check the B-E-C pin order against the footprint before layout release; small BJTs are easy to rotate or mirror by accident.", ], pins: { BASE: "1", EMITTER: "2", COLLECTOR: "3", }, }) const yageoRc0201Datasheet = " const kemetMlccDatasheet = " const defineYageoRc0201 = (mpn: string, value: string) => definePart({ id: mpn, kicadSymbol: "Device:R", footprint: "Resistor_SMD:R_0201_0603Metric", defaultValue: value, datasheet: yageoRc0201Datasheet, description: `Yageo ${mpn} 0201 1% thick-film resistor`, fields: { Manufacturer: "Yageo", MPN: mpn, Tolerance: "1%", Power: "0.05W", }, designNotes: [ "This BOM is locked to an exact Yageo RC0201FR-07 1% resistor, not a generic 0201 placeholder.", "Keep the 1% series on the back-EMF divider path so thresholds stay predictable across temperature.", "Re-check pulse and dissipation stress if the battery domain or gate network changes.", ], pins: { A: "1", B: "2", }, }) const defineYageoRc0402 = (mpn: string, value: string) => definePart({ id: mpn, kicadSymbol: "Device:R", footprint: "Resistor_SMD:R_0402_1005Metric", defaultValue: value, datasheet: " description: `Yageo ${mpn} 0402 1% thick-film resistor`, fields: { Manufacturer: "Yageo", MPN: mpn, Tolerance: "1%", Power: "0.063W", }, designNotes: [ "Use 0402 here where the resistor sees non-trivial continuous dissipation on the switching rail.", "Do not silently shrink these positions back to 0201 without re-checking power and temperature margin.", ], pins: { A: "1", B: "2", }, }) const defineKemetMlcc = ({ mpn, value, footprint, description, voltage, dielectric, designNotes, }: { mpn: string value: string footprint: string description: string voltage: string dielectric: string designNotes: readonly string[] }) => definePart({ id: mpn, kicadSymbol: "Device:C", footprint, defaultValue: value, datasheet: kemetMlccDatasheet, description, fields: { Manufacturer: "KEMET", MPN: mpn, Dielectric: dielectric, "Rated Voltage": voltage, }, designNotes, pins: { POS: "1", NEG: "2", }, }) const resistor30r = defineYageoRc0201("RC0201FR-0730RL", "30R") const resistor470r0402 = defineYageoRc0402("RC0402FR-07470RL", "470R") const resistor1k = defineYageoRc0201("RC0201FR-071KL", "1k") const resistor10k = defineYageoRc0201("RC0201FR-0710KL", "10k") const resistor100k = defineYageoRc0201("RC0201FR-07100KL", "100k") const resistor12k = defineYageoRc0201("RC0201FR-0712KL", "12k") const resistor15k = defineYageoRc0201("RC0201FR-0715KL", "15k") const resistor33k = defineYageoRc0201("RC0201FR-0733KL", "33k") const swdVrefIsolationDiode = definePart({ id: "RB751CS40,315", kicadSymbol: "Device:D_Schottky", footprint: "tinybee:D_SOD-882", defaultValue: "RB751CS40,315", datasheet: " description: "40 V small-signal Schottky diode in SOD-882 for isolated SWD Vref sensing", designNotes: [ "This diode lets the programming header sense the target 3.3 V rail without back-powering the TLV755 when an external tool drives Vref.", "Place it close to the programming pads, and keep the +3V3 cathode side on the board rail with the isolated anode side only on the header Vref pin.", ], pins: { K: "1", A: "2", }, }) const capacitor100nF0402 = defineKemetMlcc({ mpn: "C0402C104K4RACTU", value: "100nF", footprint: "Capacitor_SMD:C_0402_1005Metric", description: "KEMET 100nF 16V X7R MLCC, 0402", voltage: "16V", dielectric: "X7R", designNotes: [ "This exact 16 V X7R part is locked for the 100 nF bypass positions in this 1S design.", "Use it for local high-frequency bypass on +BATT or V3.3; do not silently substitute a lower-voltage or poor-stability dielectric.", ], }) const capacitor100nF0201 = defineKemetMlcc({ mpn: "C0201C104K9PACTU", value: "100nF", footprint: "Capacitor_SMD:C_0201_0603Metric", description: "KEMET 100nF 6.3V X5R MLCC, 0201", voltage: "6.3V", dielectric: "X5R", designNotes: [ "Use this only for local low-voltage decoupling like the CH32 VDD bypass.", "Do not silently reuse this 0201 part on the battery rail; keep the battery-facing 100 nF positions on the 16 V 0402 part.", ], }) const capacitor1uF0402 = defineKemetMlcc({ mpn: "C0402C105K8PAC7411", value: "1uF", footprint: "Capacitor_SMD:C_0402_1005Metric", description: "KEMET 1uF 10V X5R MLCC, 0402", voltage: "10V", dielectric: "X5R", designNotes: [ "This exact 10 V X5R part is the TLV755 output capacitor and satisfies the regulator's 1 uF ceramic requirement.", "A 0402 body is acceptable here, but this is still a regulator output part, not a battery-domain bypass; do not shrink it further without checking bias derating and stability.", ], }) const capacitor22uF0805 = defineKemetMlcc({ mpn: "C0805C226M8PACTU", value: "22uF", footprint: "Capacitor_SMD:C_0805_2012Metric", description: "KEMET 22uF 10V X5R MLCC, 0805", voltage: "10V", dielectric: "X5R", designNotes: [ "This exact 10 V X5R 0805 part is the 1S battery-side bulk capacitor.", "Keep this input bulk capacitor in 0805 or larger; do not shrink it back to 0603 without re-checking effective capacitance at 1S bias.", ], }) const C1 = instantiate(capacitor1uF0402, "C1") const C2 = instantiate(capacitor100nF0201, "C2") const C3 = instantiate(capacitor100nF0402, "C3") const C4 = instantiate(capacitor22uF0805, "C4") const C5 = instantiate(capacitor100nF0201, "C5") const C6 = instantiate(capacitor22uF0805, "C6") const Q1 = instantiate(complementaryHalfBridge, "Q1") const Q2 = instantiate(complementaryHalfBridge, "Q2") const Q3 = instantiate(complementaryHalfBridge, "Q3") const Q4 = instantiate(highSidePullDownBjt, "Q4") const Q5 = instantiate(highSidePullDownBjt, "Q5") const Q6 = instantiate(highSidePullDownBjt, "Q6") const J_CTRL = instantiate(controlHeader, "J_CTRL") const J_BATT = instantiate(batteryHeader, "J_BATT") const J_MOTOR = instantiate(motorHeader, "J_MOTOR") const TP_PROG = instantiate(programmingHeader, "TP_PROG") const D1 = instantiate(swdVrefIsolationDiode, "D1") const R1 = instantiate(resistor30r, "R1") const R2 = instantiate(resistor1k, "R2") const R3 = instantiate(resistor10k, "R3") const R4 = instantiate(resistor470r0402, "R4") const R5 = instantiate(resistor30r, "R5") const R6 = instantiate(resistor1k, "R6") const R7 = instantiate(resistor10k, "R7") const R8 = instantiate(resistor470r0402, "R8") const R9 = instantiate(resistor30r, "R9") const R10 = instantiate(resistor1k, "R10") const R11 = instantiate(resistor10k, "R11") const R12 = instantiate(resistor470r0402, "R12") const R13 = instantiate(resistor15k, "R13") const R14 = instantiate(resistor33k, "R14") const R15 = instantiate(resistor100k, "R15") const R16 = instantiate(resistor15k, "R16") const R17 = instantiate(resistor33k, "R17") const R18 = instantiate(resistor100k, "R18") const R19 = instantiate(resistor15k, "R19") const R20 = instantiate(resistor33k, "R20") const R21 = instantiate(resistor100k, "R21") const R22 = instantiate(resistor100k, "R22") const R23 = instantiate(resistor100k, "R23") const R24 = instantiate(resistor100k, "R24") const R25 = instantiate(resistor12k, "R25") const R26 = instantiate(resistor33k, "R26") const R27 = instantiate(resistor1k, "R27") const U1 = instantiate(tlv75533pdqnt, "U1") const U2 = instantiate(ch32v203f8u6, "U2") const tinybeeEscChannel = defineCircuit({ name: "tinybee-esc-channel", source: "projects/tinybee/circuitd/tinybee-esc-channel.ts", description: "1S CH32-based tinybee ESC channel aligned to the openwch RISC-V_ESC V203 pinout", parts: [ C1, C2, C3, C4, C5, C6, D1, J_BATT, J_CTRL, J_MOTOR, Q1, Q2, Q3, Q4, Q5, Q6, R1, R2, R3, R4, R5, R6, R7, R8, R9, R10, R11, R12, R13, R14, R15, R16, R17, R18, R19, R20, R21, R22, R23, R24, R25, R26, R27, TP_PROG, U1, U2, ], nets: [ net( "+BATTERY", pin(J_BATT, "PIN1"), pin(C3, "POS"), pin(C4, "POS"), pin(C6, "POS"), pin(Q1, "HIGH_SIDE_SOURCE"), pin(Q2, "HIGH_SIDE_SOURCE"), pin(Q3, "HIGH_SIDE_SOURCE"), pin(R4, "B"), pin(R8, "B"), pin(R12, "B"), pin(R25, "B"), pin(U1, "IN"), pin(U1, "EN"), ), net("/ADC_VOLTAGE_SENSE", pin(C5, "POS"), pin(R25, "A"), pin(R26, "B"), pin(U2, "PA1/ADC1")), net("/A_HIGH_COMMAND", pin(R2, "B"), pin(U2, "PA10/CH3")), net("/A_LOW_COMMAND", pin(R1, "B"), pin(U2, "PB1/ADC9/OP1O1/CH3N")), net("/A_HIGH_CONTROL", pin(Q4, "BASE"), pin(R2, "A"), pin(R3, "B")), net("/A_LOW_GATE", pin(Q1, "LOW_SIDE_GATE"), pin(R1, "A"), pin(R22, "B")), net("/A_P_GATE", pin(Q1, "HIGH_SIDE_GATE"), pin(Q4, "COLLECTOR"), pin(R4, "A")), net("/A_BACK_EMF", pin(R13, "A"), pin(R14, "B"), pin(R15, "A"), pin(U2, "PA5/ADC5/OP2N1")), net("/B_BACK_EMF", pin(R16, "A"), pin(R17, "B"), pin(R18, "A"), pin(U2, "PB10/OP2N0")), net("/C_BACK_EMF", pin(R19, "A"), pin(R20, "B"), pin(R21, "A"), pin(U2, "PB11/OP1N0")), net("/BACK_EMF_COMMON", pin(R15, "B"), pin(R18, "B"), pin(R21, "B"), pin(U2, "PB14/OP2P0"), pin(U2, "PB15/OP1P0")), net("/B_HIGH_COMMAND", pin(R6, "B"), pin(U2, "PA9/CH2")), net("/B_LOW_COMMAND", pin(R5, "B"), pin(U2, "PB0/ADC8/OP1P1/CH2N")), net("/B_HIGH_CONTROL", pin(Q5, "BASE"), pin(R6, "A"), pin(R7, "B")), net("/B_LOW_GATE", pin(Q3, "LOW_SIDE_GATE"), pin(R5, "A"), pin(R23, "B")), net("/B_P_GATE", pin(Q3, "HIGH_SIDE_GATE"), pin(Q5, "COLLECTOR"), pin(R8, "A")), net("/C_HIGH_COMMAND", pin(R10, "B"), pin(U2, "PA8/CH1")), net("/C_LOW_COMMAND", pin(R9, "B"), pin(U2, "PA7/ADC7/OP2P1/CH1N")), net("/C_HIGH_CONTROL", pin(Q6, "BASE"), pin(R10, "A"), pin(R11, "B")), net("/C_LOW_GATE", pin(Q2, "LOW_SIDE_GATE"), pin(R9, "A"), pin(R24, "B")), net("/C_P_GATE", pin(Q2, "HIGH_SIDE_GATE"), pin(Q6, "COLLECTOR"), pin(R12, "A")), net("/PWM_INPUT", pin(J_CTRL, "PIN1"), pin(R27, "A")), net("/PWM_INPUT_MCU", pin(R27, "B"), pin(U2, "PA0/WKUP/ADC0")), net("/OPA_ZERO_CROSS_INTERRUPT", pin(U2, "PA2/ADC2/OP2O0"), pin(U2, "PA3/ADC3/OP1O0"), pin(U2, "PA4/ADC4/OP2O1")), net("/PHASE_A", pin(J_MOTOR, "PIN1"), pin(Q1, "HIGH_SIDE_DRAIN"), pin(Q1, "LOW_SIDE_DRAIN"), pin(R13, "B")), net("/PHASE_B", pin(J_MOTOR, "PIN2"), pin(Q3, "HIGH_SIDE_DRAIN"), pin(Q3, "LOW_SIDE_DRAIN"), pin(R16, "B")), net("/PHASE_C", pin(J_MOTOR, "PIN3"), pin(Q2, "HIGH_SIDE_DRAIN"), pin(Q2, "LOW_SIDE_DRAIN"), pin(R19, "B")), net("/SWD_CLOCK", pin(TP_PROG, "PIN1"), pin(U2, "PA14/SWC/PA11/UDM")), net("/SWD_DATA", pin(TP_PROG, "PIN2"), pin(U2, "PA13/SWD/PA12/UDP")), net("/SWD_VREF", pin(D1, "A"), pin(TP_PROG, "PIN4")), net( "GND", pin(J_BATT, "PIN2"), pin(C1, "NEG"), pin(C2, "NEG"), pin(C3, "NEG"), pin(C4, "NEG"), pin(C6, "NEG"), pin(Q1, "LOW_SIDE_SOURCE"), pin(Q2, "LOW_SIDE_SOURCE"), pin(Q3, "LOW_SIDE_SOURCE"), pin(Q4, "EMITTER"), pin(Q5, "EMITTER"), pin(Q6, "EMITTER"), pin(R3, "A"), pin(R7, "A"), pin(R11, "A"), pin(R14, "A"), pin(R17, "A"), pin(R20, "A"), pin(R22, "A"), pin(R23, "A"), pin(R24, "A"), pin(R26, "A"), pin(C5, "NEG"), pin(TP_PROG, "PIN3"), pin(U1, "GND"), pin(U1, "THERMAL_PAD"), pin(U2, "GND"), ), net("+3V3", pin(C1, "POS"), pin(C2, "POS"), pin(D1, "K"), pin(U1, "OUT"), pin(U2, "VDD")), net("unconnected-(U2-PA6{slash}ADC6{slash}OP1N1{slash}BKI-Pad20)", pin(U2, "PA6/ADC6/OP1N1/BKI")), ], }) const outputPath = path.resolve(__dirname, "generated", " const main = () => { mkdirSync(path.dirname(outputPath), { recursive: true }) writeFileSync(outputPath, exportKiCadNetlist(tinybeeEscChannel), "utf8") process.stdout.write(`${outputPath}\n`) } if (import.meta.main) { main() } export { tinybeeEscChannel } export default tinybeeEscChannel
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i'm looking for feedback, thank you here's the full definition of my schematic: import { mkdirSync, writeFileSync } from "node:fs" import path from "node:path" import { defineCircuit, definePart, exportKiCadNetlist, instantiate, net, pin, } from "../../../tools/circuitd/src" const ch32v203f8u6 = definePart({ id: "CH32V203F8U6", kicadSymbol: "tinybee:CH32V203F8U6", footprint: "tinybee:QFN-20_L3.0-W3.0-P0.40-BL-EP1.7", defaultValue: "CH32V203F8U6", datasheet: " description: "144 MHz RISC-V MCU with ADCs, op-amps, advanced timers, and SWD", fields: { "LCSC Part": "C7570477", }, designNotes: [ "Power this MCU from a 3.3 V rail only; do not allow the VDD pin to see more than 3.6 V.", "Place a 100 nF decoupler immediately next to VDD and the QFN ground return, and keep that loop as short as possible.", "Put a small series resistor between PA0 and any off-board throttle or one-wire configuration signal so the MCU pin is not directly exposed at the connector.", "Keep PA13 and PA14 easy to probe and free of hard loads so SWD still works during bring-up and recovery.", "Keep PA8, PA9, PA10, PA7, PB0, and PB1 on the three phase-drive nets, and keep PA6/BKI free for a future fault or protection input.", "If you follow the openwch RISC-V ESC zero-cross scheme, tie PA3 and PA4 back into PA2 externally and reserve PA2 for that shared interrupt net.", "Route back-EMF and op-amp related pins away from phase copper, gate-drive loops, and other fast-switching nodes.", ], pins: { "PA0/WKUP/ADC0": "1", "PA1/ADC1": "2", "PA2/ADC2/OP2O0": "3", "PA3/ADC3/OP1O0": "4", "PA4/ADC4/OP2O1": "5", "PA5/ADC5/OP2N1": "6", "PA7/ADC7/OP2P1/CH1N": "7", "PB0/ADC8/OP1P1/CH2N": "8", "PB1/ADC9/OP1O1/CH3N": "9", "PB10/OP2N0": "10", "PB11/OP1N0": "11", "PB14/OP2P0": "12", "PB15/OP1P0": "13", "PA8/CH1": "14", "PA9/CH2": "15", "PA13/SWD/PA12/UDP": "16", "PA14/SWC/PA11/UDM": "17", "PA10/CH3": "18", VDD: "19", "PA6/ADC6/OP1N1/BKI": "20", GND: "21", }, }) const tlv75533pdqnt = definePart({ id: "TLV75533PDQNT", kicadSymbol: "Regulator_Linear:TLV75533PDBV", footprint: "tinybee:Texas_X2SON-4_1x1mm_P0.65mm", defaultValue: "TLV75533PDQNT", datasheet: " description: "500mA low-dropout fixed 3.3V regulator in 1x1mm X2SON-4", designNotes: [ "Treat +BATT as a 1S Li-ion or LiPo rail only; this regulator has a 5.5 V maximum input rating, so 2S or higher is out of bounds for this graph.", "Place at least 1 uF ceramic directly at IN and at least 1 uF ceramic directly at OUT; do not push those capacitors away from the package.", "Check regulator heating with (VIN - 3.3 V) * load current and add copper area if the dissipation is not comfortably safe.", "Add local input bulk when the battery lead is long or inductive so the LDO input does not absorb line spikes by itself.", "Keep EN tied to a known state at all times; if startup control matters later, break it out deliberately instead of bodging it in.", "The X2SON thermal pad is internally tied to GND; flood it into the local ground copper and do not leave the center pad floating.", ], pins: { OUT: "1", GND: "2", EN: "3", IN: "4", THERMAL_PAD: "5", }, }) const controlHeader = definePart({ id: "CTRL_IN_HEADER_1X01", kicadSymbol: "Connector_Generic:Conn_01x01", footprint: "tinybee:CTRL_PAD_1x01_Micro", defaultValue: "CTRL_IN", description: "1-pin control input wire pad for throttle signal", designNotes: [ "Use this only for the control signal.", "Ground reference is expected to be shared elsewhere in the system when this pad is in use.", "Battery power comes in through the dedicated battery wire holes, not through this control pad.", "PA0 on the CH32 is not a true FT input; treat this header as a 3.3 V logic input unless you deliberately add a real level-conditioning stage.", ], pins: { PIN1: "1", }, }) const motorHeader = definePart({ id: "MOTOR_OUT_HEADER_1X03", kicadSymbol: "Connector_Generic:Conn_01x03", footprint: "tinybee:MOTOR_PADS_1x03_Micro", defaultValue: "MOTOR_OUT", description: "3-pin motor phase wire pad group", designNotes: [ "This is the board edge interface for the three motor phases.", "Use direct wire holes here rather than a bulky 2.54 mm header footprint.", ], pins: { PIN1: "1", PIN2: "2", PIN3: "3", }, }) const programmingHeader = definePart({ id: "PROG_HEADER_1X04", kicadSymbol: "Connector_Generic:Conn_01x04", footprint: "tinybee:PROG_PADS_1x04_Micro", defaultValue: "PROG", description: "4-pin fine-pitch SWD programming header", designNotes: [ "Break out SWDIO, SWCLK, GND, and 3.3 V so the CH32 can be flashed and recovered without bodge wires.", "Keep this header free of extra loading and avoid reusing the SWD pins elsewhere until firmware bring-up is stable.", "Treat the 3.3 V pin here as target reference unless you deliberately design reverse-current-safe back-powering through the regulator path.", ], pins: { PIN1: "1", PIN2: "2", PIN3: "3", PIN4: "4", }, }) const batteryHeader = definePart({ id: "BATT_IN_HEADER_1X02", kicadSymbol: "Connector_Generic:Conn_01x02", footprint: "tinybee:BATT_PADS_1x02_Micro", defaultValue: "BATT_IN", description: "2-pin battery wire pad pair", designNotes: [ "Use this dedicated pair for battery positive and battery negative input.", "Keep the battery loop tight to the bulk capacitors and half-bridge supply entry.", ], pins: { PIN1: "1", PIN2: "2", }, }) const complementaryHalfBridge = definePart({ id: "PMCPB5530X_115", kicadSymbol: "tinybee:PMCPB5530X,115", footprint: "tinybee:DFN2020-6_L2.0-W2.0-P0.65-BL", defaultValue: "PMCPB5530X,115", datasheet: " description: "20 V complementary N/P MOSFET half-bridge in DFN2020-6", fields: { "LCSC Part": "C552747", }, designNotes: [ "Use this complementary half-bridge only on a 1S Li-ion or LiPo rail; do not reuse the direct P-gate pull-down topology above the 1S battery range.", "With +BATT limited to the 1S range, the direct P-gate pull-down swing stays inside the device gate limits and gives usable drive headroom.", "Drive the low-side N-FET gates directly from the 3.3 V timer outputs only in this 1S design; rework the stage before raising the battery voltage.", "Do not skimp on local +BATT bypass; keep real ceramic bulk plus a high-frequency bypass capacitor tight to the half-bridge supply loop.", "Pour the duplicated drain pads into real copper for current and heat spreading; do not neck them down right at the package.", "Keep each gate loop short, tight, and referenced to its own source return to reduce ringing and false turn-on.", "Assume the board copper sets the real current limit; check temperature rise on the actual ESC geometry, not only the datasheet headline current.", ], pins: { LOW_SIDE_SOURCE: "1", LOW_SIDE_GATE: "2", HIGH_SIDE_DRAIN: ["3", "8"], HIGH_SIDE_SOURCE: "4", HIGH_SIDE_GATE: "5", LOW_SIDE_DRAIN: ["6", "7"], }, }) const highSidePullDownBjt = definePart({ id: "BC847BLP_7", kicadSymbol: "Transistor_BJT:Q_NPN_BEC", footprint: "Package_TO_SOT_SMD:SOT-883", defaultValue: "BC847BLP-7", datasheet: " description: "45 V, 100 mA NPN small-signal transistor in SOT-883", designNotes: [ "Use this device only as the helper pull-down for the high-side P-gate nets; do not put motor or supply current through it as a power path element.", "In this topology, keep emitter at GND, collector on the P-gate net, and drive the base through a resistor from the MCU.", "Give the base a defined pulldown so the PMOS high side stays off while the MCU is in reset or high-impedance.", "With a 470R P-gate pull-up on a 1S rail, this transistor sinks about 9 mA at full turn-on, which is still well inside the BC847BLP-7's capability.", "Check the B-E-C pin order against the footprint before layout release; small BJTs are easy to rotate or mirror by accident.", ], pins: { BASE: "1", EMITTER: "2", COLLECTOR: "3", }, }) const yageoRc0201Datasheet = " const kemetMlccDatasheet = " const defineYageoRc0201 = (mpn: string, value: string) => definePart({ id: mpn, kicadSymbol: "Device:R", footprint: "Resistor_SMD:R_0201_0603Metric", defaultValue: value, datasheet: yageoRc0201Datasheet, description: `Yageo ${mpn} 0201 1% thick-film resistor`, fields: { Manufacturer: "Yageo", MPN: mpn, Tolerance: "1%", Power: "0.05W", }, designNotes: [ "This BOM is locked to an exact Yageo RC0201FR-07 1% resistor, not a generic 0201 placeholder.", "Keep the 1% series on the back-EMF divider path so thresholds stay predictable across temperature.", "Re-check pulse and dissipation stress if the battery domain or gate network changes.", ], pins: { A: "1", B: "2", }, }) const defineYageoRc0402 = (mpn: string, value: string) => definePart({ id: mpn, kicadSymbol: "Device:R", footprint: "Resistor_SMD:R_0402_1005Metric", defaultValue: value, datasheet: " description: `Yageo ${mpn} 0402 1% thick-film resistor`, fields: { Manufacturer: "Yageo", MPN: mpn, Tolerance: "1%", Power: "0.063W", }, designNotes: [ "Use 0402 here where the resistor sees non-trivial continuous dissipation on the switching rail.", "Do not silently shrink these positions back to 0201 without re-checking power and temperature margin.", ], pins: { A: "1", B: "2", }, }) const defineKemetMlcc = ({ mpn, value, footprint, description, voltage, dielectric, designNotes, }: { mpn: string value: string footprint: string description: string voltage: string dielectric: string designNotes: readonly string[] }) => definePart({ id: mpn, kicadSymbol: "Device:C", footprint, defaultValue: value, datasheet: kemetMlccDatasheet, description, fields: { Manufacturer: "KEMET", MPN: mpn, Dielectric: dielectric, "Rated Voltage": voltage, }, designNotes, pins: { POS: "1", NEG: "2", }, }) const resistor30r = defineYageoRc0201("RC0201FR-0730RL", "30R") const resistor470r0402 = defineYageoRc0402("RC0402FR-07470RL", "470R") const resistor1k = defineYageoRc0201("RC0201FR-071KL", "1k") const resistor10k = defineYageoRc0201("RC0201FR-0710KL", "10k") const resistor100k = defineYageoRc0201("RC0201FR-07100KL", "100k") const resistor12k = defineYageoRc0201("RC0201FR-0712KL", "12k") const resistor15k = defineYageoRc0201("RC0201FR-0715KL", "15k") const resistor33k = defineYageoRc0201("RC0201FR-0733KL", "33k") const swdVrefIsolationDiode = definePart({ id: "RB751CS40,315", kicadSymbol: "Device:D_Schottky", footprint: "tinybee:D_SOD-882", defaultValue: "RB751CS40,315", datasheet: " description: "40 V small-signal Schottky diode in SOD-882 for isolated SWD Vref sensing", designNotes: [ "This diode lets the programming header sense the target 3.3 V rail without back-powering the TLV755 when an external tool drives Vref.", "Place it close to the programming pads, and keep the +3V3 cathode side on the board rail with the isolated anode side only on the header Vref pin.", ], pins: { K: "1", A: "2", }, }) const capacitor100nF0402 = defineKemetMlcc({ mpn: "C0402C104K4RACTU", value: "100nF", footprint: "Capacitor_SMD:C_0402_1005Metric", description: "KEMET 100nF 16V X7R MLCC, 0402", voltage: "16V", dielectric: "X7R", designNotes: [ "This exact 16 V X7R part is locked for the 100 nF bypass positions in this 1S design.", "Use it for local high-frequency bypass on +BATT or V3.3; do not silently substitute a lower-voltage or poor-stability dielectric.", ], }) const capacitor100nF0201 = defineKemetMlcc({ mpn: "C0201C104K9PACTU", value: "100nF", footprint: "Capacitor_SMD:C_0201_0603Metric", description: "KEMET 100nF 6.3V X5R MLCC, 0201", voltage: "6.3V", dielectric: "X5R", designNotes: [ "Use this only for local low-voltage decoupling like the CH32 VDD bypass.", "Do not silently reuse this 0201 part on the battery rail; keep the battery-facing 100 nF positions on the 16 V 0402 part.", ], }) const capacitor1uF0402 = defineKemetMlcc({ mpn: "C0402C105K8PAC7411", value: "1uF", footprint: "Capacitor_SMD:C_0402_1005Metric", description: "KEMET 1uF 10V X5R MLCC, 0402", voltage: "10V", dielectric: "X5R", designNotes: [ "This exact 10 V X5R part is the TLV755 output capacitor and satisfies the regulator's 1 uF ceramic requirement.", "A 0402 body is acceptable here, but this is still a regulator output part, not a battery-domain bypass; do not shrink it further without checking bias derating and stability.", ], }) const capacitor22uF0805 = defineKemetMlcc({ mpn: "C0805C226M8PACTU", value: "22uF", footprint: "Capacitor_SMD:C_0805_2012Metric", description: "KEMET 22uF 10V X5R MLCC, 0805", voltage: "10V", dielectric: "X5R", designNotes: [ "This exact 10 V X5R 0805 part is the 1S battery-side bulk capacitor.", "Keep this input bulk capacitor in 0805 or larger; do not shrink it back to 0603 without re-checking effective capacitance at 1S bias.", ], }) const C1 = instantiate(capacitor1uF0402, "C1") const C2 = instantiate(capacitor100nF0201, "C2") const C3 = instantiate(capacitor100nF0402, "C3") const C4 = instantiate(capacitor22uF0805, "C4") const C5 = instantiate(capacitor100nF0201, "C5") const C6 = instantiate(capacitor22uF0805, "C6") const Q1 = instantiate(complementaryHalfBridge, "Q1") const Q2 = instantiate(complementaryHalfBridge, "Q2") const Q3 = instantiate(complementaryHalfBridge, "Q3") const Q4 = instantiate(highSidePullDownBjt, "Q4") const Q5 = instantiate(highSidePullDownBjt, "Q5") const Q6 = instantiate(highSidePullDownBjt, "Q6") const J_CTRL = instantiate(controlHeader, "J_CTRL") const J_BATT = instantiate(batteryHeader, "J_BATT") const J_MOTOR = instantiate(motorHeader, "J_MOTOR") const TP_PROG = instantiate(programmingHeader, "TP_PROG") const D1 = instantiate(swdVrefIsolationDiode, "D1") const R1 = instantiate(resistor30r, "R1") const R2 = instantiate(resistor1k, "R2") const R3 = instantiate(resistor10k, "R3") const R4 = instantiate(resistor470r0402, "R4") const R5 = instantiate(resistor30r, "R5") const R6 = instantiate(resistor1k, "R6") const R7 = instantiate(resistor10k, "R7") const R8 = instantiate(resistor470r0402, "R8") const R9 = instantiate(resistor30r, "R9") const R10 = instantiate(resistor1k, "R10") const R11 = instantiate(resistor10k, "R11") const R12 = instantiate(resistor470r0402, "R12") const R13 = instantiate(resistor15k, "R13") const R14 = instantiate(resistor33k, "R14") const R15 = instantiate(resistor100k, "R15") const R16 = instantiate(resistor15k, "R16") const R17 = instantiate(resistor33k, "R17") const R18 = instantiate(resistor100k, "R18") const R19 = instantiate(resistor15k, "R19") const R20 = instantiate(resistor33k, "R20") const R21 = instantiate(resistor100k, "R21") const R22 = instantiate(resistor100k, "R22") const R23 = instantiate(resistor100k, "R23") const R24 = instantiate(resistor100k, "R24") const R25 = instantiate(resistor12k, "R25") const R26 = instantiate(resistor33k, "R26") const R27 = instantiate(resistor1k, "R27") const U1 = instantiate(tlv75533pdqnt, "U1") const U2 = instantiate(ch32v203f8u6, "U2") const tinybeeEscChannel = defineCircuit({ name: "tinybee-esc-channel", source: "projects/tinybee/circuitd/tinybee-esc-channel.ts", description: "1S CH32-based tinybee ESC channel aligned to the openwch RISC-V_ESC V203 pinout", parts: [ C1, C2, C3, C4, C5, C6, D1, J_BATT, J_CTRL, J_MOTOR, Q1, Q2, Q3, Q4, Q5, Q6, R1, R2, R3, R4, R5, R6, R7, R8, R9, R10, R11, R12, R13, R14, R15, R16, R17, R18, R19, R20, R21, R22, R23, R24, R25, R26, R27, TP_PROG, U1, U2, ], nets: [ net( "+BATTERY", pin(J_BATT, "PIN1"), pin(C3, "POS"), pin(C4, "POS"), pin(C6, "POS"), pin(Q1, "HIGH_SIDE_SOURCE"), pin(Q2, "HIGH_SIDE_SOURCE"), pin(Q3, "HIGH_SIDE_SOURCE"), pin(R4, "B"), pin(R8, "B"), pin(R12, "B"), pin(R25, "B"), pin(U1, "IN"), pin(U1, "EN"), ), net("/ADC_VOLTAGE_SENSE", pin(C5, "POS"), pin(R25, "A"), pin(R26, "B"), pin(U2, "PA1/ADC1")), net("/A_HIGH_COMMAND", pin(R2, "B"), pin(U2, "PA10/CH3")), net("/A_LOW_COMMAND", pin(R1, "B"), pin(U2, "PB1/ADC9/OP1O1/CH3N")), net("/A_HIGH_CONTROL", pin(Q4, "BASE"), pin(R2, "A"), pin(R3, "B")), net("/A_LOW_GATE", pin(Q1, "LOW_SIDE_GATE"), pin(R1, "A"), pin(R22, "B")), net("/A_P_GATE", pin(Q1, "HIGH_SIDE_GATE"), pin(Q4, "COLLECTOR"), pin(R4, "A")), net("/A_BACK_EMF", pin(R13, "A"), pin(R14, "B"), pin(R15, "A"), pin(U2, "PA5/ADC5/OP2N1")), net("/B_BACK_EMF", pin(R16, "A"), pin(R17, "B"), pin(R18, "A"), pin(U2, "PB10/OP2N0")), net("/C_BACK_EMF", pin(R19, "A"), pin(R20, "B"), pin(R21, "A"), pin(U2, "PB11/OP1N0")), net("/BACK_EMF_COMMON", pin(R15, "B"), pin(R18, "B"), pin(R21, "B"), pin(U2, "PB14/OP2P0"), pin(U2, "PB15/OP1P0")), net("/B_HIGH_COMMAND", pin(R6, "B"), pin(U2, "PA9/CH2")), net("/B_LOW_COMMAND", pin(R5, "B"), pin(U2, "PB0/ADC8/OP1P1/CH2N")), net("/B_HIGH_CONTROL", pin(Q5, "BASE"), pin(R6, "A"), pin(R7, "B")), net("/B_LOW_GATE", pin(Q3, "LOW_SIDE_GATE"), pin(R5, "A"), pin(R23, "B")), net("/B_P_GATE", pin(Q3, "HIGH_SIDE_GATE"), pin(Q5, "COLLECTOR"), pin(R8, "A")), net("/C_HIGH_COMMAND", pin(R10, "B"), pin(U2, "PA8/CH1")), net("/C_LOW_COMMAND", pin(R9, "B"), pin(U2, "PA7/ADC7/OP2P1/CH1N")), net("/C_HIGH_CONTROL", pin(Q6, "BASE"), pin(R10, "A"), pin(R11, "B")), net("/C_LOW_GATE", pin(Q2, "LOW_SIDE_GATE"), pin(R9, "A"), pin(R24, "B")), net("/C_P_GATE", pin(Q2, "HIGH_SIDE_GATE"), pin(Q6, "COLLECTOR"), pin(R12, "A")), net("/PWM_INPUT", pin(J_CTRL, "PIN1"), pin(R27, "A")), net("/PWM_INPUT_MCU", pin(R27, "B"), pin(U2, "PA0/WKUP/ADC0")), net("/OPA_ZERO_CROSS_INTERRUPT", pin(U2, "PA2/ADC2/OP2O0"), pin(U2, "PA3/ADC3/OP1O0"), pin(U2, "PA4/ADC4/OP2O1")), net("/PHASE_A", pin(J_MOTOR, "PIN1"), pin(Q1, "HIGH_SIDE_DRAIN"), pin(Q1, "LOW_SIDE_DRAIN"), pin(R13, "B")), net("/PHASE_B", pin(J_MOTOR, "PIN2"), pin(Q3, "HIGH_SIDE_DRAIN"), pin(Q3, "LOW_SIDE_DRAIN"), pin(R16, "B")), net("/PHASE_C", pin(J_MOTOR, "PIN3"), pin(Q2, "HIGH_SIDE_DRAIN"), pin(Q2, "LOW_SIDE_DRAIN"), pin(R19, "B")), net("/SWD_CLOCK", pin(TP_PROG, "PIN1"), pin(U2, "PA14/SWC/PA11/UDM")), net("/SWD_DATA", pin(TP_PROG, "PIN2"), pin(U2, "PA13/SWD/PA12/UDP")), net("/SWD_VREF", pin(D1, "A"), pin(TP_PROG, "PIN4")), net( "GND", pin(J_BATT, "PIN2"), pin(C1, "NEG"), pin(C2, "NEG"), pin(C3, "NEG"), pin(C4, "NEG"), pin(C6, "NEG"), pin(Q1, "LOW_SIDE_SOURCE"), pin(Q2, "LOW_SIDE_SOURCE"), pin(Q3, "LOW_SIDE_SOURCE"), pin(Q4, "EMITTER"), pin(Q5, "EMITTER"), pin(Q6, "EMITTER"), pin(R3, "A"), pin(R7, "A"), pin(R11, "A"), pin(R14, "A"), pin(R17, "A"), pin(R20, "A"), pin(R22, "A"), pin(R23, "A"), pin(R24, "A"), pin(R26, "A"), pin(C5, "NEG"), pin(TP_PROG, "PIN3"), pin(U1, "GND"), pin(U1, "THERMAL_PAD"), pin(U2, "GND"), ), net("+3V3", pin(C1, "POS"), pin(C2, "POS"), pin(D1, "K"), pin(U1, "OUT"), pin(U2, "VDD")), net("unconnected-(U2-PA6{slash}ADC6{slash}OP1N1{slash}BKI-Pad20)", pin(U2, "PA6/ADC6/OP1N1/BKI")), ], }) const outputPath = path.resolve(__dirname, "generated", " const main = () => { mkdirSync(path.dirname(outputPath), { recursive: true }) writeFileSync(outputPath, exportKiCadNetlist(tinybeeEscChannel), "utf8") process.stdout.write(`${outputPath}\n`) } if (import.meta.main) { main() } export { tinybeeEscChannel } export default tinybeeEscChannel

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$MU $SNDK $LITE $VRT NVIDIA and Groq: 2nd and 3rd Order Strategic Infrastructure Effects and Market Implications Public reporting indicates NVIDIA has agreed to acquire Groq for approximately $20,000,000,000 in cash, while excluding Groq’s nascent cloud business from the transaction perimeter. The reported carve-out materially constrains the immediate, direct linkage from the acquisition to incremental, NVIDIA-controlled data center capacity build-out because GroqCloud appears to be the principal channel through which Groq hardware is currently monetized at scale as a service. The infrastructure-market implications therefore depend primarily on post-close product strategy: whether NVIDIA (1) commercializes Groq silicon as a distinct inference product line and drives broad deployment through OEM/ODM channels and partners, (2) uses the acquisition mainly to absorb IP and talent while de-emphasizing standalone Groq hardware volumes, or (3) uses Groq technology to reshape NVIDIA’s own inference systems and networking roadmaps. The dominant transmission mechanism into memory, networking, and facility infrastructure markets is the degree to which NVIDIA shifts incremental inference deployments away from GPU architectures that are tightly coupled to external high-bandwidth memory (HBM) and toward Groq’s current architecture, which emphasizes large on-chip SRAM, deterministic compiler-scheduled execution, and direct chip-to-chip connectivity. Independent and company-published materials describe Groq’s current-generation approach as having no external memory, keeping weights and KV cache on-chip during processing, and requiring model sharding across multiple chips due to limited on-chip SRAM per device. That architectural choice is directionally HBM-negative on a per-accelerator basis and ambiguous for DRAM, NAND, networking, power, and cooling on a per-token basis because the design can reduce memory wall losses and tail-latency overhead while potentially increasing the number of chips and interconnect endpoints required to serve large models and long-context workloads. HBM implications are the most mechanically straightforward but should be framed as second-derivative rather than absolute. If Groq-class inference silicon meaningfully displaces NVIDIA GPU-based inference deployments, incremental HBM bit demand tied to inference growth could be reduced relative to a GPU-only baseline because Groq’s current approach does not appear to attach HBM stacks to each accelerator. However, current market structure suggests HBM remains supply-constrained and is being pulled by multiple vectors including continued GPU training scale and high-capacity inference configurations, with leading suppliers signaling tight conditions extending beyond 2026. In that environment, reduced inference-driven HBM intensity could primarily reallocate scarce HBM supply toward higher-end training and premium inference GPUs rather than creating an outright volume collapse, preserving high utilization of HBM capacity while potentially affecting the slope of pricing power and capacity expansion urgency over a multi-year horizon. The key downside scenario for the HBM complex would be a durable architectural bifurcation where “good-enough” inference shifts disproportionately to HBM-less ASICs across a broad swath of deployments (latency-sensitive, batch-1, cost-per-token optimized), while training remains GPU-HBM dominated; such a split would reduce the portion of future inference compute that naturally monetizes through HBM content and could compress the incremental HBM-per-AI-dollar ratio. The key upside/neutral scenario for HBM is that the supply chain remains fully allocated regardless, with NVIDIA using any “freed” HBM to ship more high-end GPUs into training and long-context inference, especially as roadmaps increase HBM per GPU, sustaining robust aggregate bit demand even if inference becomes more heterogeneous. Conventional DRAM implications split into 2 channels: (1) DRAM wafer capacity diversion into HBM and (2) DDR content per server in AI clusters. Supplier commentary indicates that AI-driven memory demand is supporting elevated DRAM markets more broadly, and HBM production is resource-intensive versus conventional DRAM, tightening supply for DDR products in parallel. A meaningful NVIDIA pivot to an inference architecture that reduces HBM dependence could, at the margin, ease the most acute HBM-driven bottlenecks and allow memory manufacturers more flexibility in balancing DRAM mix, which could be modestly DDR-positive on the supply side (less crowding-out) even if it is DDR-neutral or slightly negative on the demand side (if per-node CPU/DDR requirements decline due to more efficient accelerator utilization). The dominant practical outcome is likely that DDR demand remains supported by broad AI server proliferation and increasing memory footprints at the system level (CPUs, networking stacks, caching layers, retrieval-augmented pipelines), while HBM remains the premium profit pool; therefore, any HBM displacement that increases total server volumes could indirectly keep DDR demand resilient even if DDR per accelerator is not rising materially. NAND flash implications are comparatively indirect and volume-driven rather than architecture-driven. Inference clusters require SSD capacity for model storage, container images, logging, and increasingly for fast local retrieval indices and embedding stores, but the storage footprint per unit of compute is typically smaller than in training pipelines that stage large datasets and checkpoints. If NVIDIA uses Groq to lower inference cost and latency enough to expand the total number of inference deployment locations (regional colocation, enterprise on-prem, sovereign footprints), aggregate SSD attach could rise through geographic fragmentation and replication of model artifacts across more sites, even if per-site storage is modest. The NAND effect is therefore likely to be demand-broadening and mix-positive (datacenter SSDs) but not a primary swing factor versus the macro AI capex cycle and consumer/device cycles. Hard disk drive (HDD) markets should see negligible direct sensitivity because nearline HDD demand is driven by bulk storage and cloud archiving economics, while inference acceleration choices primarily reshape compute and network layers; any HDD benefit would be a tertiary function of overall data center square footage expansion rather than a direct consequence of Groq silicon displacing GPUs. Optical networking implications require separating (1) intra-cluster back-end fabrics that connect accelerators and (2) front-end / data center interconnect (DCI) that connects sites and regions. Groq’s own positioning and third-party reporting suggest scaling beyond a single node or rack relies on high-bandwidth fabrics and, in some described configurations, optical interconnect scaling across hundreds of chips. If NVIDIA commercializes Groq at scale, 2 offsetting forces emerge: lower cost-per-token and improved latency could expand inference throughput and drive more east-west traffic, increasing demand for high-speed switching and optics; conversely, if Groq delivers materially higher utilization and tokens per unit of network bandwidth for certain workloads, the network required per served token could decline. Public NVIDIA materials already indicate an aggressive photonics roadmap aimed at scaling AI factories, including co-packaged optics (CPO) switches and explicit collaboration with Coherent and Lumentum in the silicon photonics supply chain. That linkage is important because it suggests that, independent of Groq, NVIDIA is already pushing optics integration deeper into the switch package to reduce power and increase resiliency; Groq increases the strategic incentive to reduce network power and latency if inference becomes even more distributed and latency-sensitive. For Lumentum and Coherent specifically, the net implication is less about “more optics versus fewer optics” and more about a shift in optics form factor and value capture. Co-packaged optics can reduce reliance on pluggable transceivers in some switch architectures while increasing demand for integrated photonic engines, lasers, fiber attach, packaging processes, and component-level supply. NVIDIA’s own announcements explicitly position Coherent and Lumentum as collaborators in creating the integrated silicon/optics process and supply chain for photonics switches. If Groq accelerates the transition to very large-scale fabrics (more endpoints, higher port speeds, tighter power envelopes), that tends to pull forward CPO adoption and amplifies demand for the underlying photonics components even if the conventional pluggable module TAM is structurally pressured over time. If Groq instead pushes inference toward smaller, more localized pods (closer to users, more regional colocation), that can be optics-positive for DCI and metro connectivity because more sites must be interconnected at high bandwidth with low latency, favoring coherent optics and high-speed interconnect between facilities. The principal risk for optics suppliers is timing and margin structure: a faster move to NVIDIA-driven integrated photonics could concentrate bargaining power and compress margins for commoditized transceiver modules while favoring suppliers with differentiated lasers, integration capability, and qualification depth in NVIDIA’s CPO ecosystem. AEC and copper interconnect implications hinge on whether Groq deployment increases the density of short-reach links inside racks and rows. High-speed copper remains structurally advantaged at very short distances on cost, power, and serviceability, but reaches become constrained as lane speeds and aggregate bandwidth rise, creating a role for active electrical cables (AECs), retimers, and signal-conditioning silicon. Credo explicitly positions its AEC products as enabling reliable lossless 800G connectivity for AI clusters, and the company has highlighted participation at NVIDIA GTC with content focused on extending PCIe/CXL using AECs, indicating relevance to next-generation system topologies that require longer reach and higher signal integrity than passive copper can deliver. If NVIDIA turns Groq into a widely deployed inference card or chassis product, the likely near-term effect is AEC-positive because (1) more inference throughput tends to increase top-of-rack connectivity requirements, (2) distributing inference across more racks and sites increases short-reach links per unit of delivered service, and (3) PCIe-attached accelerator architectures tend to require robust signal conditioning as systems move to PCIe 6.x and beyond. Groq workshop materials explicitly reference GroqCard and GroqNode form factors, reinforcing that PCIe-attached deployment has been central to Groq’s current packaging strategy. The main countervailing risk is that Groq’s deterministic chip-to-chip fabric could be implemented primarily through backplanes and direct board-level connectivity that reduces the need for merchant AECs inside the box; in that case, incremental AEC demand would concentrate more in rack-to-switch and node-to-fabric links rather than within-chassis chip fabrics. Astera Labs implications are connectivity-architecture sensitive and, on balance, skew positive if NVIDIA increases heterogeneity and disaggregation in AI systems. NVIDIA has publicly positioned NVLink Fusion as a pathway for partners to build semi-custom AI infrastructure and has explicitly identified Astera Labs as a partner in that ecosystem, with Astera describing NVLink-related solutions expanding its connectivity platform across PCIe, CXL, and Ethernet plus fleet observability software. A Groq acquisition increases the probability that NVIDIA offers a broader menu of accelerators (training GPUs, inference-focused ASICs) and therefore increases the importance of scalable, high-reliability connectivity, retiming, switching, and telemetry across mixed topologies. If Groq silicon remains PCIe-attached in many deployments, PCIe 6.x retimers/switches and active cable modules become more central, aligning with Astera’s core portfolio. If NVIDIA instead integrates Groq concepts into scale-up fabrics (NVLink-like domains) or uses Groq to expand into inference “appliances” that must be rapidly deployed in colocation environments, the need for standard-compliant, serviceable connectivity with strong RAS/telemetry increases, again aligning with Astera’s positioning. Power equipment and cooling implications for Vertiv and adjacent suppliers should be viewed through the lens of rack power density, cooling modality (air vs liquid), and site deployment model (hyperscale campuses vs distributed colocation/enterprise). Groq claims its LPU and rack designs are “air-cooled by design” and require no complex cooling and power infrastructure, and third-party reporting has described Groq’s approach as relying on parallelism across many lower-power units rather than extreme per-chip performance. If NVIDIA scales Groq as a mainstream inference platform, the mix of data center cooling spend could shift modestly away from the highest-density liquid-cooled racks toward more air-cooled or hybrid deployments, particularly for inference pods placed in existing facilities that cannot easily retrofit for very high rack heat flux. That would be a mix headwind for suppliers most levered exclusively to high-end liquid cooling attachments per rack, but it is not necessarily a volume headwind for Vertiv given the company’s broad exposure to both power and cooling infrastructure and the likelihood that total AI deployment locations expand. Vertiv’s own industry commentary emphasizes that AI racks require higher power-density UPS, batteries, power distribution equipment, and switchgear capable of handling rapid load transients, and that hybrid cooling systems will evolve across deployment environments. Those statements align with a world where inference growth increases the count of powered racks and raises the operational complexity of power delivery even if per-rack density is lower than the most extreme training clusters. The most material infrastructure impact may occur outside the rack and upstream of the data hall: grid interconnects, substations, transformers, switchgear, generators, and utility-scale generation additions. Recent regulatory actions in the U.S. highlight that projected data center demand is already driving large planned increases in electricity generation capacity, underscoring that power availability is a binding constraint. In that context, an inference architecture that lowers joules per token could reduce the power required per unit of inference delivered, but it can also accelerate demand by lowering cost and improving latency, increasing the total volume of inference served (a classic rebound effect). The net outcome is likely continued, elevated demand for power infrastructure even if efficiency improves, with the key swing factor being whether AI capex remains on a multi-year growth trajectory or enters a digestion phase. Other data center infrastructure implications include server/ODM mix, facility design standardization, and networking architecture choices. If NVIDIA positions Groq-based inference as a broadly distributable “standard server + accelerator” solution rather than as an integrated, liquid-cooled rack like GB200 NVL72, spend could shift toward more conventional air-cooled server designs, higher unit volumes of mainstream racks, and faster deployment in colocation footprints, increasing demand for modular power rooms, busways, and rapidly deployable cooling solutions. If NVIDIA instead integrates Groq into its “AI factory” paradigm, the primary effect is likely acceleration of dense back-end fabric build-outs and a faster push toward photonics switching, increasing demand for fiber plant, connectors, and integrated optics supply chains while potentially compressing the lifecycle of transitional architectures based on pluggable optics and mid-reach copper. NVIDIA’s stated roadmap toward co-packaged optics and silicon photonics switches is already oriented toward scaling to very large GPU counts; adding a high-end inference ASIC increases the strategic importance of power-efficient, low-latency fabrics because inference economics become increasingly sensitive to network overhead as compute cost declines. Across the covered segments, the most defensible base case is limited near-term dislocation and a medium-term increase in uncertainty around memory intensity per unit of inference growth. HBM faces the clearest relative risk from an HBM-less inference platform, but supply tightness and GPU training roadmaps reduce the probability of an absolute demand shock over the next 12–24 months. Optical, AEC/copper, and power/cooling are more likely to remain volume-supported because they scale with endpoint count, deployment fragmentation, and total data center footprint, and those tend to rise when inference becomes cheaper and more widely deployed. The highest-conviction second-order effect is a shift in infrastructure mix: incrementally more distributed inference deployments (favoring colocation power/cooling standardization, DCI optics, and serviceable short-reach interconnect) and a gradual migration from pluggable optics toward integrated photonics in back-end fabrics (favoring suppliers positioned in the CPO ecosystem).
9:00

$MU $SNDK $LITE $VRT NVIDIA and Groq: 2nd and 3rd Order Strategic Infrastructure Effects and Market Implications Public reporting indicates NVIDIA has agreed to acquire Groq for approximately $20,000,000,000 in cash, while excluding Groq’s nascent cloud business from the transaction perimeter. The reported carve-out materially constrains the immediate, direct linkage from the acquisition to incremental, NVIDIA-controlled data center capacity build-out because GroqCloud appears to be the principal channel through which Groq hardware is currently monetized at scale as a service. The infrastructure-market implications therefore depend primarily on post-close product strategy: whether NVIDIA (1) commercializes Groq silicon as a distinct inference product line and drives broad deployment through OEM/ODM channels and partners, (2) uses the acquisition mainly to absorb IP and talent while de-emphasizing standalone Groq hardware volumes, or (3) uses Groq technology to reshape NVIDIA’s own inference systems and networking roadmaps. The dominant transmission mechanism into memory, networking, and facility infrastructure markets is the degree to which NVIDIA shifts incremental inference deployments away from GPU architectures that are tightly coupled to external high-bandwidth memory (HBM) and toward Groq’s current architecture, which emphasizes large on-chip SRAM, deterministic compiler-scheduled execution, and direct chip-to-chip connectivity. Independent and company-published materials describe Groq’s current-generation approach as having no external memory, keeping weights and KV cache on-chip during processing, and requiring model sharding across multiple chips due to limited on-chip SRAM per device. That architectural choice is directionally HBM-negative on a per-accelerator basis and ambiguous for DRAM, NAND, networking, power, and cooling on a per-token basis because the design can reduce memory wall losses and tail-latency overhead while potentially increasing the number of chips and interconnect endpoints required to serve large models and long-context workloads. HBM implications are the most mechanically straightforward but should be framed as second-derivative rather than absolute. If Groq-class inference silicon meaningfully displaces NVIDIA GPU-based inference deployments, incremental HBM bit demand tied to inference growth could be reduced relative to a GPU-only baseline because Groq’s current approach does not appear to attach HBM stacks to each accelerator. However, current market structure suggests HBM remains supply-constrained and is being pulled by multiple vectors including continued GPU training scale and high-capacity inference configurations, with leading suppliers signaling tight conditions extending beyond 2026. In that environment, reduced inference-driven HBM intensity could primarily reallocate scarce HBM supply toward higher-end training and premium inference GPUs rather than creating an outright volume collapse, preserving high utilization of HBM capacity while potentially affecting the slope of pricing power and capacity expansion urgency over a multi-year horizon. The key downside scenario for the HBM complex would be a durable architectural bifurcation where “good-enough” inference shifts disproportionately to HBM-less ASICs across a broad swath of deployments (latency-sensitive, batch-1, cost-per-token optimized), while training remains GPU-HBM dominated; such a split would reduce the portion of future inference compute that naturally monetizes through HBM content and could compress the incremental HBM-per-AI-dollar ratio. The key upside/neutral scenario for HBM is that the supply chain remains fully allocated regardless, with NVIDIA using any “freed” HBM to ship more high-end GPUs into training and long-context inference, especially as roadmaps increase HBM per GPU, sustaining robust aggregate bit demand even if inference becomes more heterogeneous. Conventional DRAM implications split into 2 channels: (1) DRAM wafer capacity diversion into HBM and (2) DDR content per server in AI clusters. Supplier commentary indicates that AI-driven memory demand is supporting elevated DRAM markets more broadly, and HBM production is resource-intensive versus conventional DRAM, tightening supply for DDR products in parallel. A meaningful NVIDIA pivot to an inference architecture that reduces HBM dependence could, at the margin, ease the most acute HBM-driven bottlenecks and allow memory manufacturers more flexibility in balancing DRAM mix, which could be modestly DDR-positive on the supply side (less crowding-out) even if it is DDR-neutral or slightly negative on the demand side (if per-node CPU/DDR requirements decline due to more efficient accelerator utilization). The dominant practical outcome is likely that DDR demand remains supported by broad AI server proliferation and increasing memory footprints at the system level (CPUs, networking stacks, caching layers, retrieval-augmented pipelines), while HBM remains the premium profit pool; therefore, any HBM displacement that increases total server volumes could indirectly keep DDR demand resilient even if DDR per accelerator is not rising materially. NAND flash implications are comparatively indirect and volume-driven rather than architecture-driven. Inference clusters require SSD capacity for model storage, container images, logging, and increasingly for fast local retrieval indices and embedding stores, but the storage footprint per unit of compute is typically smaller than in training pipelines that stage large datasets and checkpoints. If NVIDIA uses Groq to lower inference cost and latency enough to expand the total number of inference deployment locations (regional colocation, enterprise on-prem, sovereign footprints), aggregate SSD attach could rise through geographic fragmentation and replication of model artifacts across more sites, even if per-site storage is modest. The NAND effect is therefore likely to be demand-broadening and mix-positive (datacenter SSDs) but not a primary swing factor versus the macro AI capex cycle and consumer/device cycles. Hard disk drive (HDD) markets should see negligible direct sensitivity because nearline HDD demand is driven by bulk storage and cloud archiving economics, while inference acceleration choices primarily reshape compute and network layers; any HDD benefit would be a tertiary function of overall data center square footage expansion rather than a direct consequence of Groq silicon displacing GPUs. Optical networking implications require separating (1) intra-cluster back-end fabrics that connect accelerators and (2) front-end / data center interconnect (DCI) that connects sites and regions. Groq’s own positioning and third-party reporting suggest scaling beyond a single node or rack relies on high-bandwidth fabrics and, in some described configurations, optical interconnect scaling across hundreds of chips. If NVIDIA commercializes Groq at scale, 2 offsetting forces emerge: lower cost-per-token and improved latency could expand inference throughput and drive more east-west traffic, increasing demand for high-speed switching and optics; conversely, if Groq delivers materially higher utilization and tokens per unit of network bandwidth for certain workloads, the network required per served token could decline. Public NVIDIA materials already indicate an aggressive photonics roadmap aimed at scaling AI factories, including co-packaged optics (CPO) switches and explicit collaboration with Coherent and Lumentum in the silicon photonics supply chain. That linkage is important because it suggests that, independent of Groq, NVIDIA is already pushing optics integration deeper into the switch package to reduce power and increase resiliency; Groq increases the strategic incentive to reduce network power and latency if inference becomes even more distributed and latency-sensitive. For Lumentum and Coherent specifically, the net implication is less about “more optics versus fewer optics” and more about a shift in optics form factor and value capture. Co-packaged optics can reduce reliance on pluggable transceivers in some switch architectures while increasing demand for integrated photonic engines, lasers, fiber attach, packaging processes, and component-level supply. NVIDIA’s own announcements explicitly position Coherent and Lumentum as collaborators in creating the integrated silicon/optics process and supply chain for photonics switches. If Groq accelerates the transition to very large-scale fabrics (more endpoints, higher port speeds, tighter power envelopes), that tends to pull forward CPO adoption and amplifies demand for the underlying photonics components even if the conventional pluggable module TAM is structurally pressured over time. If Groq instead pushes inference toward smaller, more localized pods (closer to users, more regional colocation), that can be optics-positive for DCI and metro connectivity because more sites must be interconnected at high bandwidth with low latency, favoring coherent optics and high-speed interconnect between facilities. The principal risk for optics suppliers is timing and margin structure: a faster move to NVIDIA-driven integrated photonics could concentrate bargaining power and compress margins for commoditized transceiver modules while favoring suppliers with differentiated lasers, integration capability, and qualification depth in NVIDIA’s CPO ecosystem. AEC and copper interconnect implications hinge on whether Groq deployment increases the density of short-reach links inside racks and rows. High-speed copper remains structurally advantaged at very short distances on cost, power, and serviceability, but reaches become constrained as lane speeds and aggregate bandwidth rise, creating a role for active electrical cables (AECs), retimers, and signal-conditioning silicon. Credo explicitly positions its AEC products as enabling reliable lossless 800G connectivity for AI clusters, and the company has highlighted participation at NVIDIA GTC with content focused on extending PCIe/CXL using AECs, indicating relevance to next-generation system topologies that require longer reach and higher signal integrity than passive copper can deliver. If NVIDIA turns Groq into a widely deployed inference card or chassis product, the likely near-term effect is AEC-positive because (1) more inference throughput tends to increase top-of-rack connectivity requirements, (2) distributing inference across more racks and sites increases short-reach links per unit of delivered service, and (3) PCIe-attached accelerator architectures tend to require robust signal conditioning as systems move to PCIe 6.x and beyond. Groq workshop materials explicitly reference GroqCard and GroqNode form factors, reinforcing that PCIe-attached deployment has been central to Groq’s current packaging strategy. The main countervailing risk is that Groq’s deterministic chip-to-chip fabric could be implemented primarily through backplanes and direct board-level connectivity that reduces the need for merchant AECs inside the box; in that case, incremental AEC demand would concentrate more in rack-to-switch and node-to-fabric links rather than within-chassis chip fabrics. Astera Labs implications are connectivity-architecture sensitive and, on balance, skew positive if NVIDIA increases heterogeneity and disaggregation in AI systems. NVIDIA has publicly positioned NVLink Fusion as a pathway for partners to build semi-custom AI infrastructure and has explicitly identified Astera Labs as a partner in that ecosystem, with Astera describing NVLink-related solutions expanding its connectivity platform across PCIe, CXL, and Ethernet plus fleet observability software. A Groq acquisition increases the probability that NVIDIA offers a broader menu of accelerators (training GPUs, inference-focused ASICs) and therefore increases the importance of scalable, high-reliability connectivity, retiming, switching, and telemetry across mixed topologies. If Groq silicon remains PCIe-attached in many deployments, PCIe 6.x retimers/switches and active cable modules become more central, aligning with Astera’s core portfolio. If NVIDIA instead integrates Groq concepts into scale-up fabrics (NVLink-like domains) or uses Groq to expand into inference “appliances” that must be rapidly deployed in colocation environments, the need for standard-compliant, serviceable connectivity with strong RAS/telemetry increases, again aligning with Astera’s positioning. Power equipment and cooling implications for Vertiv and adjacent suppliers should be viewed through the lens of rack power density, cooling modality (air vs liquid), and site deployment model (hyperscale campuses vs distributed colocation/enterprise). Groq claims its LPU and rack designs are “air-cooled by design” and require no complex cooling and power infrastructure, and third-party reporting has described Groq’s approach as relying on parallelism across many lower-power units rather than extreme per-chip performance. If NVIDIA scales Groq as a mainstream inference platform, the mix of data center cooling spend could shift modestly away from the highest-density liquid-cooled racks toward more air-cooled or hybrid deployments, particularly for inference pods placed in existing facilities that cannot easily retrofit for very high rack heat flux. That would be a mix headwind for suppliers most levered exclusively to high-end liquid cooling attachments per rack, but it is not necessarily a volume headwind for Vertiv given the company’s broad exposure to both power and cooling infrastructure and the likelihood that total AI deployment locations expand. Vertiv’s own industry commentary emphasizes that AI racks require higher power-density UPS, batteries, power distribution equipment, and switchgear capable of handling rapid load transients, and that hybrid cooling systems will evolve across deployment environments. Those statements align with a world where inference growth increases the count of powered racks and raises the operational complexity of power delivery even if per-rack density is lower than the most extreme training clusters. The most material infrastructure impact may occur outside the rack and upstream of the data hall: grid interconnects, substations, transformers, switchgear, generators, and utility-scale generation additions. Recent regulatory actions in the U.S. highlight that projected data center demand is already driving large planned increases in electricity generation capacity, underscoring that power availability is a binding constraint. In that context, an inference architecture that lowers joules per token could reduce the power required per unit of inference delivered, but it can also accelerate demand by lowering cost and improving latency, increasing the total volume of inference served (a classic rebound effect). The net outcome is likely continued, elevated demand for power infrastructure even if efficiency improves, with the key swing factor being whether AI capex remains on a multi-year growth trajectory or enters a digestion phase. Other data center infrastructure implications include server/ODM mix, facility design standardization, and networking architecture choices. If NVIDIA positions Groq-based inference as a broadly distributable “standard server + accelerator” solution rather than as an integrated, liquid-cooled rack like GB200 NVL72, spend could shift toward more conventional air-cooled server designs, higher unit volumes of mainstream racks, and faster deployment in colocation footprints, increasing demand for modular power rooms, busways, and rapidly deployable cooling solutions. If NVIDIA instead integrates Groq into its “AI factory” paradigm, the primary effect is likely acceleration of dense back-end fabric build-outs and a faster push toward photonics switching, increasing demand for fiber plant, connectors, and integrated optics supply chains while potentially compressing the lifecycle of transitional architectures based on pluggable optics and mid-reach copper. NVIDIA’s stated roadmap toward co-packaged optics and silicon photonics switches is already oriented toward scaling to very large GPU counts; adding a high-end inference ASIC increases the strategic importance of power-efficient, low-latency fabrics because inference economics become increasingly sensitive to network overhead as compute cost declines. Across the covered segments, the most defensible base case is limited near-term dislocation and a medium-term increase in uncertainty around memory intensity per unit of inference growth. HBM faces the clearest relative risk from an HBM-less inference platform, but supply tightness and GPU training roadmaps reduce the probability of an absolute demand shock over the next 12–24 months. Optical, AEC/copper, and power/cooling are more likely to remain volume-supported because they scale with endpoint count, deployment fragmentation, and total data center footprint, and those tend to rise when inference becomes cheaper and more widely deployed. The highest-conviction second-order effect is a shift in infrastructure mix: incrementally more distributed inference deployments (favoring colocation power/cooling standardization, DCI optics, and serviceable short-reach interconnect) and a gradual migration from pluggable optics toward integrated photonics in back-end fabrics (favoring suppliers positioned in the CPO ecosystem).

TheValueist

76,170 görüntüleme • 7 ay önce

This is restored footage of a F6F Hellcat belly-landing on a carrier in 1944, with no landing gear, sliding down the deck. Watch what the crew does. They do not run away from the crashing plane. They run toward it. This is the story of the men on the deck.. A Controlled Crash Landing an aircraft on a carrier has been called one of the most difficult and dangerous things in all of aviation. Some pilots described it as a controlled crash. Think about what it involves. A fighter comes screaming toward a tiny strip of deck on a ship that is itself moving through the ocean, pitching on the swell. The pilot has only a few feet of margin. He has to slam his aircraft down onto a precise spot, at exactly the right speed and angle, again and again, every time he comes home. To stop the plane in the short space of the deck, each aircraft had a hook mounted under its tail. As it touched down, that tailhook had to catch one of several steel cables stretched across the deck, called arresting wires. The cable would snatch the speeding fighter and drag it to a halt in about two seconds. But what happened when it went wrong? When Things Went Wrong That is where the danger truly began. If a pilot came in with damaged landing gear, or no gear at all like the Hellcat in this footage, or if his tailhook missed every wire, the aircraft became a several-ton object sliding down a steel deck out of control. And the front of that deck was not empty. It was often packed with other aircraft, fueled and armed, and crowded with men working. A plane that slid all the way forward could plow straight into parked aircraft and deck crews, and turn the whole deck into an inferno. So the carriers had a last line of defense. A crash barrier, a wall of heavy steel cable raised across the middle of the deck, designed to catch a runaway aircraft and stop it before it reached the crowd at the bow. Time and again, that barrier was all that stood between one bad landing and a catastrophe. The Landing Signal Officer Guiding every one of those landings was one man in an incredibly exposed position. He was the Landing Signal Officer, and he stood on a small platform at the aft port side of the flight deck, close to where the aircraft came in. Holding a bright paddle in each hand, he signaled to each incoming pilot, telling him he was too high, too low, too fast, lined up wrong, or clear to land. The pilot trusted those paddles with his life. A good Landing Signal Officer could talk a shaken pilot and a shot-up aircraft safely down onto the deck. It was a job that demanded total calm and split-second judgment, over and over, with lives riding on every signal. One young officer who served as a Landing Signal Officer early in the war, David McCampbell, would go on to become the US Navy's top-scoring ace. The Men Who Ran Toward the Fire Then there were the men who ran toward the fire. The flight deck of a wartime carrier was a storm of spinning propellers, roaring engines, live bombs, high-octane fuel, and steel cables under enormous tension that could snap and cut a man in half. To manage the chaos, the crews wore jerseys in different colors, each color marking a job, so that in the deafening noise everyone could tell at a glance who did what. Men in one color directed the aircraft, another handled the arresting gear, another fueled the planes, another the bombs. And among them were the men in heavy asbestos suits, nicknamed the Hot Papas. Their job, when an aircraft crashed and burst into flames, was to run directly into the fire and pull the pilot out. That is what you are watching in this footage. As the Hellcat grinds to a stop, the men who rush toward it are not spectators. They are doing their job, closing on a possible fire and a trapped pilot without hesitating. The Forgotten Crew Landing accidents like this happened constantly. Belly landings, missed wires, barrier crashes, and deck fires were so common that they were simply accepted as part of the price of operating aircraft at sea. For every dramatic dogfight in the sky, there were thousands of these tense, dangerous moments on the deck, handled by young men in colored shirts who are almost never remembered. The pilots got the glory, and they earned it. But they could not have flown at all without the deck crews who launched them, guided them home, caught them when they came in wrong, and ran into the flames when it all went bad. The next time you see footage like this, do not just watch the plane. Watch the men around it. They worked one of the most dangerous jobs of the entire war, and most of the world never knew their names. This was the story of the carrier deck crews. I post a story like this every single day. Most people never see them. Follow so you don't miss the next one.
0:21

This is restored footage of a F6F Hellcat belly-landing on a carrier in 1944, with no landing gear, sliding down the deck. Watch what the crew does. They do not run away from the crashing plane. They run toward it. This is the story of the men on the deck.. A Controlled Crash Landing an aircraft on a carrier has been called one of the most difficult and dangerous things in all of aviation. Some pilots described it as a controlled crash. Think about what it involves. A fighter comes screaming toward a tiny strip of deck on a ship that is itself moving through the ocean, pitching on the swell. The pilot has only a few feet of margin. He has to slam his aircraft down onto a precise spot, at exactly the right speed and angle, again and again, every time he comes home. To stop the plane in the short space of the deck, each aircraft had a hook mounted under its tail. As it touched down, that tailhook had to catch one of several steel cables stretched across the deck, called arresting wires. The cable would snatch the speeding fighter and drag it to a halt in about two seconds. But what happened when it went wrong? When Things Went Wrong That is where the danger truly began. If a pilot came in with damaged landing gear, or no gear at all like the Hellcat in this footage, or if his tailhook missed every wire, the aircraft became a several-ton object sliding down a steel deck out of control. And the front of that deck was not empty. It was often packed with other aircraft, fueled and armed, and crowded with men working. A plane that slid all the way forward could plow straight into parked aircraft and deck crews, and turn the whole deck into an inferno. So the carriers had a last line of defense. A crash barrier, a wall of heavy steel cable raised across the middle of the deck, designed to catch a runaway aircraft and stop it before it reached the crowd at the bow. Time and again, that barrier was all that stood between one bad landing and a catastrophe. The Landing Signal Officer Guiding every one of those landings was one man in an incredibly exposed position. He was the Landing Signal Officer, and he stood on a small platform at the aft port side of the flight deck, close to where the aircraft came in. Holding a bright paddle in each hand, he signaled to each incoming pilot, telling him he was too high, too low, too fast, lined up wrong, or clear to land. The pilot trusted those paddles with his life. A good Landing Signal Officer could talk a shaken pilot and a shot-up aircraft safely down onto the deck. It was a job that demanded total calm and split-second judgment, over and over, with lives riding on every signal. One young officer who served as a Landing Signal Officer early in the war, David McCampbell, would go on to become the US Navy's top-scoring ace. The Men Who Ran Toward the Fire Then there were the men who ran toward the fire. The flight deck of a wartime carrier was a storm of spinning propellers, roaring engines, live bombs, high-octane fuel, and steel cables under enormous tension that could snap and cut a man in half. To manage the chaos, the crews wore jerseys in different colors, each color marking a job, so that in the deafening noise everyone could tell at a glance who did what. Men in one color directed the aircraft, another handled the arresting gear, another fueled the planes, another the bombs. And among them were the men in heavy asbestos suits, nicknamed the Hot Papas. Their job, when an aircraft crashed and burst into flames, was to run directly into the fire and pull the pilot out. That is what you are watching in this footage. As the Hellcat grinds to a stop, the men who rush toward it are not spectators. They are doing their job, closing on a possible fire and a trapped pilot without hesitating. The Forgotten Crew Landing accidents like this happened constantly. Belly landings, missed wires, barrier crashes, and deck fires were so common that they were simply accepted as part of the price of operating aircraft at sea. For every dramatic dogfight in the sky, there were thousands of these tense, dangerous moments on the deck, handled by young men in colored shirts who are almost never remembered. The pilots got the glory, and they earned it. But they could not have flown at all without the deck crews who launched them, guided them home, caught them when they came in wrong, and ran into the flames when it all went bad. The next time you see footage like this, do not just watch the plane. Watch the men around it. They worked one of the most dangerous jobs of the entire war, and most of the world never knew their names. This was the story of the carrier deck crews. I post a story like this every single day. Most people never see them. Follow so you don't miss the next one.

Untold War Stories

145,990 görüntüleme • 21 gün önce

alright let’s do a class on nielsen ratings / witness a timeline murder? i’m about to spin the block. the programming insider screenshots below are for weds, march 31. Programming Insider is one of the few places that just posts the raw nielsen grid without spin. every demo every network every show laid out the way buyers sellers and network executives actually read it. it’s not a recap site it’s not opinion it’s the sheet and if you’re not reading the sheet you’re not actually talking about the same thing as the people making the decisions 730k and a 0.15 in adults 18–49 is a real number and it maps cleanly within the expected range. nobody serious disputes that. in the current environment you’re generally looking at: 0.10 ≈ 580k–610k 0.11 ≈ 600k–630k 0.12 ≈ 620k–660k 0.13 ≈ 650k–690k 0.14 ≈ 680k–720k 0.15 ≈ 710k–750k 0.16 ≈ 740k–790k 0.17 ≈ 780k–830k 0.18 ≈ 820k–880k 0.19 ≈ 860k–920k 0.20 ≈ 900k–960k the issue is how often people stop there and treat it like a conclusion instead of the starting point. because a single demo pulled out of context doesn’t tell you what kind of number it actually was what kind of audience it represents or what it means in a real marketplace start with the full AEW row because that’s the foundation. AEW on TBS for 121 minutes posted: 0.44 household rating 0.12 adults 18–34 0.15 adults 18–49 0.09 women 18–49 0.20 men 18–49 0.22 adults 25–54 0.13 women 25–54 0.30 men 25–54 0.10 persons 12–34 0.07 females 12–34 0.12 males 12–34 0.03 teens 12–17 730k total viewers 6th in adults 18–49 12th in total viewers that’s the entire result. not the tweet version not the clipped version not the one number people like to repeat. that full row is the reality and once you actually read it the first thing that matters is not the 0.15 it’s how that 0.15 is built 0.20 men 18–49 0.09 women 18–49 that’s not a subtle imbalance that’s the number. this is not a broad demo performance it’s a concentrated one. when one side of the demo is doing more than double the work of the other side you are not looking at wide audience adoption you are looking at a defined lane showing up consistently and that distinction is everything because certain faux authorities talk about 0.15 like it’s a universal currency when it’s not. a 0.15 built on something like 0.14 women and 0.16 men is a fundamentally different asset than a 0.15 built on 0.09 women and 0.20 men. one is balanced one is narrow. one has flexibility across advertisers scheduling and audience expansion the other is predictable reliable and capped this one is clearly the latter same story in 25–54 0.30 men 25–54 0.13 women 25–54 again more than double same structural dependence same ceiling implication and then you go younger and nothing changes 0.12 adults 18–34 0.10 persons 12–34 0.12 males 12–34 0.07 females 12–34 it’s the same shape repeated across demos which tells you this is not a one week anomaly it’s the product identity. stable consistent defined not expanding and that’s where the difference between narrow reliability and broad strategic heat actually shows up in the data this is reliable. the audience shows up. the profile is predictable. the show holds its lane it is not broad. it is not expanding. it is not signaling that new segments are coming into the tent and changing the ceiling of the property that’s not opinion that’s what the row says now zoom out to the actual cable landscape that night because this is where context starts to cut through the noise Hannity 0.50 NBA on ESPN 0.36 Jesse Watters Primetime 0.28 Gutfeld 0.25 The Source with Kaitlan Collins 0.18 AEW Dynamite 0.15 that’s the board. that’s the tiering. AEW is not competing with the leaders it’s sitting clearly below them in the next band the gap from 0.15 to 0.18 is real the gap from 0.15 to 0.25 is large the gap from 0.15 to 0.36 and 0.50 is massive and this is where people get sloppy because they use ranking to imply proximity when there isn’t any the placements are: 6th in adults 18–49 12th in total viewers those are good placements for a cable property they are not dominant placements and they are not close to dominant placements. 12th at 730k tells you exactly how much total audience is actually there across the full market not just the demo slice people like to highlight and that matters because scale still matters. total audience still matters. you don’t get to ignore it just because the demo is easier to weaponize quickly on the presidential address because this keeps getting dragged in like it explains something and it doesn’t a brief presidential address is not real competition it’s not counterprogramming it’s not sustained audience capture it’s a short interruption that hits every network at the same time. everyone gets disrupted nobody gets singled out. it doesn’t change relative positioning it doesn’t create winners or losers it’s just noise in the system and leaning on it is basically avoiding what the table actually shows same thing with hourly ranks 3rd in an hour 4th in an hour fine but relative to what. if the field is thin outside a few programs you can place well in a window and still be materially behind the actual leaders. a 0.15 does not become a 0.25 because it ranked 3rd it stays a 0.15 now zoom out even further and look at the broader tv ecosystem broadcast that same night is pulling 4M 5M viewers with broader demo balance. different ecosystem yes but it gives you scale perspective. cable is fragmented expectations are different a 0.15 can be a good cable number but that does not make it a market moving television number it makes it solid within its lane and that’s where most of the conversation should stop but it doesn’t because once you layer in actual market structure the ratings matter even less than people think they do the buyer universe is not theoretical it is already allocated high tier buyers netflix amazon apple all operate at 600k+ per telecast levels but only for global scalable franchise inventory netflix has already consolidated the global wwe backbone across raw international distribution and library. there is no incentive to layer overlapping wrestling inventory into that system amazon is deploying capital into nfl nba nascar and large scale league ecosystems. servicing ppv distribution is not the same thing as underwriting long term weekly rights. there is no mandate for niche weekly wrestling at scale apple is curating a premium global sports portfolio aligned with brand identity. nothing niche nothing polarizing nothing demo fragmented clears that filter mid tier buyers disney espn already has wwe premium live events and massive nfl nba and college football commitments. the wrestling lane is already defined at the tentpole level fox is concentrated on nfl and big ten with disciplined incremental spend and no mandate for a second wrestling property peacock is structurally tied into wwe across events and library footprint. that lane is occupied paramount plus max post merger is sitting on one of the heaviest combat sports portfolios in the market ufc at roughly 1.1b per year zuffa boxing pbr nfl afc that is category consolidation not exploration. any additional combat adjacent inventory has to clear duplication against that stack turner inside that same structure is no longer operating independently. it is part of a combined portfolio that already has a defined combat sports identity low tier buyers roku tubi vice are operating in the 150k–300k per telecast range and are not positioned to escalate into premium rights competition so when you actually map the landscape it’s not that buyers are hesitant it’s that lanes are already filled there is no real second bidder dynamic and once you remove the idea of competitive bidding the ratings stop functioning as leverage they become a utility metric now go back to the numbers 0.15 730k male heavy composition those are not bad numbers they are just not strong enough to override strategic redundancy inside a portfolio that already includes ufc and global wwe alignment across multiple platforms so the conversation shifts this is no longer what will the market pay this becomes what is this worth inside our existing portfolio can we fill two hours cheaper can we replicate the demo with studio shows shoulder programming unscripted if yes there is no leverage if no it stays but on controlled terms that’s the real decision tree and this is where the difference between narrow reliability and broad strategic heat becomes the entire story this is reliable inventory. it shows up every week it delivers a consistent demo it fills two hours it holds a lane it is not broad strategic heat. it does not expand the audience map it does not unlock new advertiser categories it does not create urgency across buyers it does not force capital to move and that’s not a criticism it’s a classification so the clean read is simple the number is real the audience is still there the composition is still narrow the placement is still upper middle and none of that on its own creates leverage in a market that is already structurally allocated this is a property negotiating inside someone else’s portfolio not across an open market and that leads to the only conclusion that actually matters once capital is already deployed across nfl nba ufc and global wwe distribution and once the high tier buyers are structurally filtered out this stops being a rights negotiation driven by ratings and becomes an internal portfolio decision driven by overlap cost efficiency and replacement value. at that point a steady 0.15 does not create leverage it defines the floor of what that two hour block is worth relative to everything else competing for the same capital and now add the part everyone either ignores or pretends doesn’t exist TKO is effectively sitting on ~100% of premium combat sports market share at scale when you look at UFC plus WWE across global distribution lanes. that’s not just another player in the category that is the category so when you’re talking about where AEW fits you’re not comparing it in a vacuum you’re comparing it against the most consolidated combat sports stack the business has ever seen and that stack isn’t just operating independently Ari Emanuel has been advising David Ellison for 15+ years that relationship matters because it shapes how these portfolios are thought about at the highest level. this isn’t random alignment this is long term strategic overlap between the people actually making decisions about where billions in rights fees go so when you layer that on top of a potential Paramount controlled WBD structure you’re not just dealing with ratings anymore you’re dealing with a fully informed portfolio strategy that already knows exactly what it values in combat sports and what it doesn’t and then you zoom all the way out to cultural positioning because this part matters more than people think Pat McAfee is in the main event at WrestleMania that’s not a throwaway detail that’s the signal that’s WWE extending into mainstream sports media personalities who already command massive audiences across multiple platforms and pulling them into the biggest event in the space that’s what broad strategic heat actually looks like not just a consistent demo number not just reliable weekly inventory but expansion into new audience layers new distribution touchpoints and new cultural relevance that travels outside the core base so when you put all of this together the picture gets even clearer AEW is stable AEW is reliable AEW fills a lane but it’s operating in a market where the category leader already controls the majority of premium combat IP the decision makers are aligned at the highest levels the buyer universe is structurally closed and the biggest player is actively expanding its cultural footprint beyond wrestling itself that’s the environment so yes a 0.15 matters. yes 730k matters the number isn’t fake the number isn’t terrible the number is specific it tells you exactly what the show is right now it tells you the core audience showed up it tells you that audience is heavily male it tells you women are materially underrepresented it tells you the show converts to about 730k it tells you where it sits on the night it tells you the audience shape hasn’t changed what it doesn’t tell you matters just as much it doesn’t tell you the audience is expanding it doesn’t tell you the show is broadening it doesn’t tell you the ceiling moved this was a good night for a show with a defined audience but none of it overrides the reality that this is being evaluated inside a system that already knows what “must have” looks like and right now that bar is being set somewhere else entirely cc: Dave Meltzer
6:23

alright let’s do a class on nielsen ratings / witness a timeline murder? i’m about to spin the block. the programming insider screenshots below are for weds, march 31. Programming Insider is one of the few places that just posts the raw nielsen grid without spin. every demo every network every show laid out the way buyers sellers and network executives actually read it. it’s not a recap site it’s not opinion it’s the sheet and if you’re not reading the sheet you’re not actually talking about the same thing as the people making the decisions 730k and a 0.15 in adults 18–49 is a real number and it maps cleanly within the expected range. nobody serious disputes that. in the current environment you’re generally looking at: 0.10 ≈ 580k–610k 0.11 ≈ 600k–630k 0.12 ≈ 620k–660k 0.13 ≈ 650k–690k 0.14 ≈ 680k–720k 0.15 ≈ 710k–750k 0.16 ≈ 740k–790k 0.17 ≈ 780k–830k 0.18 ≈ 820k–880k 0.19 ≈ 860k–920k 0.20 ≈ 900k–960k the issue is how often people stop there and treat it like a conclusion instead of the starting point. because a single demo pulled out of context doesn’t tell you what kind of number it actually was what kind of audience it represents or what it means in a real marketplace start with the full AEW row because that’s the foundation. AEW on TBS for 121 minutes posted: 0.44 household rating 0.12 adults 18–34 0.15 adults 18–49 0.09 women 18–49 0.20 men 18–49 0.22 adults 25–54 0.13 women 25–54 0.30 men 25–54 0.10 persons 12–34 0.07 females 12–34 0.12 males 12–34 0.03 teens 12–17 730k total viewers 6th in adults 18–49 12th in total viewers that’s the entire result. not the tweet version not the clipped version not the one number people like to repeat. that full row is the reality and once you actually read it the first thing that matters is not the 0.15 it’s how that 0.15 is built 0.20 men 18–49 0.09 women 18–49 that’s not a subtle imbalance that’s the number. this is not a broad demo performance it’s a concentrated one. when one side of the demo is doing more than double the work of the other side you are not looking at wide audience adoption you are looking at a defined lane showing up consistently and that distinction is everything because certain faux authorities talk about 0.15 like it’s a universal currency when it’s not. a 0.15 built on something like 0.14 women and 0.16 men is a fundamentally different asset than a 0.15 built on 0.09 women and 0.20 men. one is balanced one is narrow. one has flexibility across advertisers scheduling and audience expansion the other is predictable reliable and capped this one is clearly the latter same story in 25–54 0.30 men 25–54 0.13 women 25–54 again more than double same structural dependence same ceiling implication and then you go younger and nothing changes 0.12 adults 18–34 0.10 persons 12–34 0.12 males 12–34 0.07 females 12–34 it’s the same shape repeated across demos which tells you this is not a one week anomaly it’s the product identity. stable consistent defined not expanding and that’s where the difference between narrow reliability and broad strategic heat actually shows up in the data this is reliable. the audience shows up. the profile is predictable. the show holds its lane it is not broad. it is not expanding. it is not signaling that new segments are coming into the tent and changing the ceiling of the property that’s not opinion that’s what the row says now zoom out to the actual cable landscape that night because this is where context starts to cut through the noise Hannity 0.50 NBA on ESPN 0.36 Jesse Watters Primetime 0.28 Gutfeld 0.25 The Source with Kaitlan Collins 0.18 AEW Dynamite 0.15 that’s the board. that’s the tiering. AEW is not competing with the leaders it’s sitting clearly below them in the next band the gap from 0.15 to 0.18 is real the gap from 0.15 to 0.25 is large the gap from 0.15 to 0.36 and 0.50 is massive and this is where people get sloppy because they use ranking to imply proximity when there isn’t any the placements are: 6th in adults 18–49 12th in total viewers those are good placements for a cable property they are not dominant placements and they are not close to dominant placements. 12th at 730k tells you exactly how much total audience is actually there across the full market not just the demo slice people like to highlight and that matters because scale still matters. total audience still matters. you don’t get to ignore it just because the demo is easier to weaponize quickly on the presidential address because this keeps getting dragged in like it explains something and it doesn’t a brief presidential address is not real competition it’s not counterprogramming it’s not sustained audience capture it’s a short interruption that hits every network at the same time. everyone gets disrupted nobody gets singled out. it doesn’t change relative positioning it doesn’t create winners or losers it’s just noise in the system and leaning on it is basically avoiding what the table actually shows same thing with hourly ranks 3rd in an hour 4th in an hour fine but relative to what. if the field is thin outside a few programs you can place well in a window and still be materially behind the actual leaders. a 0.15 does not become a 0.25 because it ranked 3rd it stays a 0.15 now zoom out even further and look at the broader tv ecosystem broadcast that same night is pulling 4M 5M viewers with broader demo balance. different ecosystem yes but it gives you scale perspective. cable is fragmented expectations are different a 0.15 can be a good cable number but that does not make it a market moving television number it makes it solid within its lane and that’s where most of the conversation should stop but it doesn’t because once you layer in actual market structure the ratings matter even less than people think they do the buyer universe is not theoretical it is already allocated high tier buyers netflix amazon apple all operate at 600k+ per telecast levels but only for global scalable franchise inventory netflix has already consolidated the global wwe backbone across raw international distribution and library. there is no incentive to layer overlapping wrestling inventory into that system amazon is deploying capital into nfl nba nascar and large scale league ecosystems. servicing ppv distribution is not the same thing as underwriting long term weekly rights. there is no mandate for niche weekly wrestling at scale apple is curating a premium global sports portfolio aligned with brand identity. nothing niche nothing polarizing nothing demo fragmented clears that filter mid tier buyers disney espn already has wwe premium live events and massive nfl nba and college football commitments. the wrestling lane is already defined at the tentpole level fox is concentrated on nfl and big ten with disciplined incremental spend and no mandate for a second wrestling property peacock is structurally tied into wwe across events and library footprint. that lane is occupied paramount plus max post merger is sitting on one of the heaviest combat sports portfolios in the market ufc at roughly 1.1b per year zuffa boxing pbr nfl afc that is category consolidation not exploration. any additional combat adjacent inventory has to clear duplication against that stack turner inside that same structure is no longer operating independently. it is part of a combined portfolio that already has a defined combat sports identity low tier buyers roku tubi vice are operating in the 150k–300k per telecast range and are not positioned to escalate into premium rights competition so when you actually map the landscape it’s not that buyers are hesitant it’s that lanes are already filled there is no real second bidder dynamic and once you remove the idea of competitive bidding the ratings stop functioning as leverage they become a utility metric now go back to the numbers 0.15 730k male heavy composition those are not bad numbers they are just not strong enough to override strategic redundancy inside a portfolio that already includes ufc and global wwe alignment across multiple platforms so the conversation shifts this is no longer what will the market pay this becomes what is this worth inside our existing portfolio can we fill two hours cheaper can we replicate the demo with studio shows shoulder programming unscripted if yes there is no leverage if no it stays but on controlled terms that’s the real decision tree and this is where the difference between narrow reliability and broad strategic heat becomes the entire story this is reliable inventory. it shows up every week it delivers a consistent demo it fills two hours it holds a lane it is not broad strategic heat. it does not expand the audience map it does not unlock new advertiser categories it does not create urgency across buyers it does not force capital to move and that’s not a criticism it’s a classification so the clean read is simple the number is real the audience is still there the composition is still narrow the placement is still upper middle and none of that on its own creates leverage in a market that is already structurally allocated this is a property negotiating inside someone else’s portfolio not across an open market and that leads to the only conclusion that actually matters once capital is already deployed across nfl nba ufc and global wwe distribution and once the high tier buyers are structurally filtered out this stops being a rights negotiation driven by ratings and becomes an internal portfolio decision driven by overlap cost efficiency and replacement value. at that point a steady 0.15 does not create leverage it defines the floor of what that two hour block is worth relative to everything else competing for the same capital and now add the part everyone either ignores or pretends doesn’t exist TKO is effectively sitting on ~100% of premium combat sports market share at scale when you look at UFC plus WWE across global distribution lanes. that’s not just another player in the category that is the category so when you’re talking about where AEW fits you’re not comparing it in a vacuum you’re comparing it against the most consolidated combat sports stack the business has ever seen and that stack isn’t just operating independently Ari Emanuel has been advising David Ellison for 15+ years that relationship matters because it shapes how these portfolios are thought about at the highest level. this isn’t random alignment this is long term strategic overlap between the people actually making decisions about where billions in rights fees go so when you layer that on top of a potential Paramount controlled WBD structure you’re not just dealing with ratings anymore you’re dealing with a fully informed portfolio strategy that already knows exactly what it values in combat sports and what it doesn’t and then you zoom all the way out to cultural positioning because this part matters more than people think Pat McAfee is in the main event at WrestleMania that’s not a throwaway detail that’s the signal that’s WWE extending into mainstream sports media personalities who already command massive audiences across multiple platforms and pulling them into the biggest event in the space that’s what broad strategic heat actually looks like not just a consistent demo number not just reliable weekly inventory but expansion into new audience layers new distribution touchpoints and new cultural relevance that travels outside the core base so when you put all of this together the picture gets even clearer AEW is stable AEW is reliable AEW fills a lane but it’s operating in a market where the category leader already controls the majority of premium combat IP the decision makers are aligned at the highest levels the buyer universe is structurally closed and the biggest player is actively expanding its cultural footprint beyond wrestling itself that’s the environment so yes a 0.15 matters. yes 730k matters the number isn’t fake the number isn’t terrible the number is specific it tells you exactly what the show is right now it tells you the core audience showed up it tells you that audience is heavily male it tells you women are materially underrepresented it tells you the show converts to about 730k it tells you where it sits on the night it tells you the audience shape hasn’t changed what it doesn’t tell you matters just as much it doesn’t tell you the audience is expanding it doesn’t tell you the show is broadening it doesn’t tell you the ceiling moved this was a good night for a show with a defined audience but none of it overrides the reality that this is being evaluated inside a system that already knows what “must have” looks like and right now that bar is being set somewhere else entirely cc: Dave Meltzer

Nick LoPiccolo

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