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Allow me to introduce my RISC-V #KianV machine, which boots #Linux on the FPGA with SDRAM. It's a simple design, but powerful. Starting with my vacation. How awesome... Linux and RISC-V forever... #Verilog is my life. #riscv

logic destroyer

21,113 subscribers

101,688 görüntüleme • 3 yıl önce •via X (Twitter)

#KianV #Linux #Verilog #riscv

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My RISC-V CPU, which is strictly implemented according to the rules of control and datapath unit, boots Linux. I need to let that sink in for a moment.

logic destroyer profil fotoğrafı

logic destroyer3 yıl önce

I didn't make an effort to be minimalist, but I'm utilizing 10% of my ECP5-85F.

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logic destroyer3 yıl önce

So now my #Linux SoC #KianRISCV is also runnable on the #TangNano20K with SDRAM, all from scratch of course. It's raining here, so I had to do that. Thanks to @DaveMugridge for the patch regarding the register file, because Gowin EDA doesn't synthesize asynchronous read correctly

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New Linux kernel and cool new logo. It's fun. Moreover, QSPI is also working now. You don't need an SD card. #kianRiscV #riscv @risc_v #linux for micros #TangNano20k @GOWIN_SEMI @sipeed

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My beautiful RISC-V Kianv CPU successfully boots Linux on the Colorlight i5/i9. We only have 8MB of SDRAM available, which is a new dimension for learning purposes. The CPU is easy to understand and based on Harris Digital Design and Computer Architecture, which I have acquired.

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I have now gotten a feel for Buildroot. I have managed to run a top command and Bruno's raytracer on the Colorlight. It's really enjoyable!

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I still can't believe that I managed to do it and that Linux works on an 8 MB RAM device. Luckily I have vacation, otherwise I would collapse.

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The Linux performance on the iCE40HX8K is fucking slow, which may seem amusing and nonsensical. However, the proof of concept has been successfully demonstrated. This is the world's first Linux SoC on the iCE40HX8K.

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More improvement part I #icoboard is running #linux with @machdyne psram 32mbyte memory #kianRiscV #rv32ima 100 percent hardware driven, no trap emulation on #ice40hx8k the one and only #fpga @risc_v endless paradise

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logic destroyer2 yıl önce

A lifelong dream realized! Always fascinated by Linux/Unix, which ran on unique hardware. Now, I've created a machine that runs my favorite OS. It features 33-bit address memory, with each process having a 32-bit virtual address space. Incredible!

Benzer Videolar

It’s still crazy that an iCE40HX8K FPGA runs the Linux 6.15-rc1 mainline kernel with networking. It’s crazy. KianV RISC-V has lost its innocence.

It’s still crazy that an iCE40HX8K FPGA runs the Linux 6.15-rc1 mainline kernel with networking. It’s crazy. KianV RISC-V has lost its innocence.

logic destroyer

17,416 görüntüleme • 1 yıl önce

I can't believe I dared to do it: an iCE40HX8K FPGA that boots a mainline 6.13.0-rc1 #Linux kernel via OpenSBI, running 100% KianV SV32 (MMU) RV32IMA Zicntr Zicsr Zifencei SSTC RISC-V. Incredible... amazing board, thanks to Machdyne UG's Kuchen iCE40HX8K FPGA board. #ice40 RISC-V International YosysHQ

I can't believe I dared to do it: an iCE40HX8K FPGA that boots a mainline 6.13.0-rc1 #Linux kernel via OpenSBI, running 100% KianV SV32 (MMU) RV32IMA Zicntr Zicsr Zifencei SSTC RISC-V. Incredible... amazing board, thanks to Machdyne UG's Kuchen iCE40HX8K FPGA board. #ice40 RISC-V International YosysHQ

logic destroyer

12,534 görüntüleme • 1 yıl önce

Hello from the KianV RISC-V Linux SoC. This machine is paying tribute to Ken Thompson and Dennis Ritchie, the founders and creators of UNIX and C. Enjoy.

Hello from the KianV RISC-V Linux SoC. This machine is paying tribute to Ken Thompson and Dennis Ritchie, the founders and creators of UNIX and C. Enjoy.

logic destroyer

15,042 görüntüleme • 1 yıl önce

Wrote a brutal C++23 CPU monitor for my KianV RISC-V Linux SoC on FPGA. It uses 8 GPIO LEDs to show live CPU load. Clean modern C++, signal-safe shutdown, no mercy , just pure hardware feedback.

Wrote a brutal C++23 CPU monitor for my KianV RISC-V Linux SoC on FPGA. It uses 8 GPIO LEDs to show live CPU load. Clean modern C++, signal-safe shutdown, no mercy , just pure hardware feedback.

logic destroyer

17,842 görüntüleme • 1 yıl önce

Yo, testing KianV StealthV on the Genesis 2 now with 1 GB of RAM and 100 MHz. This feels fucking awesome. DDR RAM is pure porn. Custom RISC-V Linux running on my own five-stage pipeline CPU. What more could you want? Of course, a badass out-of-order core is coming later. It's still in the design phase, though.

Yo, testing KianV StealthV on the Genesis 2 now with 1 GB of RAM and 100 MHz. This feels fucking awesome. DDR RAM is pure porn. Custom RISC-V Linux running on my own five-stage pipeline CPU. What more could you want? Of course, a badass out-of-order core is coming later. It's still in the design phase, though.

logic destroyer

21,577 görüntüleme • 16 gün önce

Let's write C++23 code in an academic style. I aim to implement a modern C++ threading example using 100 threads—both with and without mutex protection—on my self-designed, from-scratch RISC-V Linux SoC, KianV

Let's write C++23 code in an academic style. I aim to implement a modern C++ threading example using 100 threads—both with and without mutex protection—on my self-designed, from-scratch RISC-V Linux SoC, KianV

logic destroyer

42,708 görüntüleme • 1 yıl önce

KianV Stealth Linux RISC-V SoC. First bring-up with a 5-stage pipeline CPU and GShare branch prediction. Running at 25 MHz for now during bring-up, but already timing clean at 50 MHz. Ported my old SoC parts like SDRAM controller and UART to the new pipeline core. Caches are still primitive, memory is single-beat and one clock domain only. Tons of potential left. Fun summer ahead.

KianV Stealth Linux RISC-V SoC. First bring-up with a 5-stage pipeline CPU and GShare branch prediction. Running at 25 MHz for now during bring-up, but already timing clean at 50 MHz. Ported my old SoC parts like SDRAM controller and UART to the new pipeline core. Caches are still primitive, memory is single-beat and one clock domain only. Tons of potential left. Fun summer ahead.

logic destroyer

39,786 görüntüleme • 1 ay önce

Back in May 2022, when I got my first program running on a bare-metal RISC-V SoC that fits into an iCE40HX1K FPGA with only 1280 LUTs... that was some crazy shit!

Back in May 2022, when I got my first program running on a bare-metal RISC-V SoC that fits into an iCE40HX1K FPGA with only 1280 LUTs... that was some crazy shit!

logic destroyer

20,086 görüntüleme • 1 yıl önce

It is a significant milestone that today we are able to demonstrate our capabilities in terms of high-performance chip design in the RISC-V domain. Addressed the national roadshow on Digital India RISC-V Vega Processors and shared that PM Narendra Modi ji’s govt is all in and completely backs the RISC-V architecture in terms of developing chips, devices, etc for the Indian ecosystem and for the world. This roadshow showcases our ambitions to become one of the world’s leading nations in creating innovation around the RISC-V ISA and the DIR-V family of chips and systems. The program will be fueled by the creativity and innovation of our engineers and startups. #RISV #DiRV #NewIndia #IndiaTechade

It is a significant milestone that today we are able to demonstrate our capabilities in terms of high-performance chip design in the RISC-V domain. Addressed the national roadshow on Digital India RISC-V Vega Processors and shared that PM Narendra Modi ji’s govt is all in and completely backs the RISC-V architecture in terms of developing chips, devices, etc for the Indian ecosystem and for the world. This roadshow showcases our ambitions to become one of the world’s leading nations in creating innovation around the RISC-V ISA and the DIR-V family of chips and systems. The program will be fueled by the creativity and innovation of our engineers and startups. #RISV #DiRV #NewIndia #IndiaTechade

Rajeev Chandrasekhar 🇮🇳

34,583 görüntüleme • 2 yıl önce

Getting started with Hardware Design is as easy as 1, 2, 3, 4... 1. Draw the circuit using building blocks. 2. Map the inputs and output to FPGA pins. 3. Verify and Build. 4. Upload to the board! And you can do pretty serious stuff with this. While we start with iCEStudio (visual blocks based design) we don't have to stick to that. We can just as well write hardware using HDL and fire the compiler etc ourselves. The LUT count on the FPGA is enough to deploy a tiny RISC-V based SoC! Yes! From the Basics of Digital Electronics to customizing a RISC-V based SoC - Soan Papdi is your companion on the journey! Lectures on the basics will be uploaded to YouTube. Lectures on CPU/SoC related topics will be made available to the Library Subscribers. + You can learn more about Soan Papdi FPGA here: + You can join the Library Access with a 70% Discount here: IMPORTANT: We will revise the prices of Library Access, effective 9th Feb.

Getting started with Hardware Design is as easy as 1, 2, 3, 4... 1. Draw the circuit using building blocks. 2. Map the inputs and output to FPGA pins. 3. Verify and Build. 4. Upload to the board! And you can do pretty serious stuff with this. While we start with iCEStudio (visual blocks based design) we don't have to stick to that. We can just as well write hardware using HDL and fire the compiler etc ourselves. The LUT count on the FPGA is enough to deploy a tiny RISC-V based SoC! Yes! From the Basics of Digital Electronics to customizing a RISC-V based SoC - Soan Papdi is your companion on the journey! Lectures on the basics will be uploaded to YouTube. Lectures on CPU/SoC related topics will be made available to the Library Subscribers. + You can learn more about Soan Papdi FPGA here: + You can join the Library Access with a 70% Discount here: IMPORTANT: We will revise the prices of Library Access, effective 9th Feb.

Piyush Itankar

13,148 görüntüleme • 5 ay önce

A small step for a hobby logic designer, but a giant leap for Tiny Tapeout. The first official RISC-V uLinux ASIC, yes, ASIC, you heard that right, is operational and functional. Just dabbling in chip design as a hobbyist. Haha, what an awesome achievement! Thanx to Matthew Venn Uri Shaked tnt's public account Rebellmike troyburn psychogenic #tinytapeout #chipdesign #verilog #130nm #Skywater #yosys #openlane Wokwi #logicDesign #logicDestroyer

A small step for a hobby logic designer, but a giant leap for Tiny Tapeout. The first official RISC-V uLinux ASIC, yes, ASIC, you heard that right, is operational and functional. Just dabbling in chip design as a hobbyist. Haha, what an awesome achievement! Thanx to Matthew Venn Uri Shaked tnt's public account Rebellmike troyburn psychogenic #tinytapeout #chipdesign #verilog #130nm #Skywater #yosys #openlane Wokwi #logicDesign #logicDestroyer

logic destroyer

147,395 görüntüleme • 2 yıl önce

Exciting progress on the QF x PolkaVM front! 🚀 First, what is PolkaVM? It's a revolutionary RISC-V based virtual machine, able to that executes code at near-native speeds, while maintaining the security and portability needed for blockchain applications. PolkaVM is to QF what EVM is to Ethereum, with some added benefits Why we're bullish on PolkaVM: 🔥 Near-native execution speeds 🛠 Leverages mature RISC-V tooling ♻️ Seamless migration path for Solidity projects 🚀The world's fastest VM We've been deep in the trenches working with PolkaVM, amazing RISC-V-based smart contract execution environment (huge shoutout to Koute Parity Technologies for this groundbreaking tech!). While it's still marked as heavily under development, we're thrilled to share our progress! ✅ Configured and validated the patched LLVM toolchain (thanks to ParityTech for maintaining this crucial piece!) ✅ Got the RISC-V compilation pipeline up and running ✅ Deployed our first contracts ✅ Set up initial benchmarking framework The journey hasn't been without its challenges - the toolchain is complex and requires careful handling. Each system needs manual compilation and installation adjustments, but that's exactly the kind of technical puzzle we love solving! What's cooking next: 🔨 Launching a multi-node devnet with PolkaVM support 🔧 Running comprehensive benchmarks on our test WASM code compilation 🛠️ Experimenting with various smart contract compilation approaches 📊 Optimizing and streamlining the toolchain for broader developer accessibility The potential of RISC-V smart contracts is immense, and we're committed to pushing these capabilities forward together with the open source community. Share your thoughts on RISC-V smart contract development in the comments below. Major props to the ecosystem making this possible: -ParityTech and PolkaVM team for this innovative RISC-V approach -Substrate framework powering our core -Polkadot ecosystem for laying the groundwork -- 技術の山を登る時マシンは道具なり一の直感が道を照らす

Exciting progress on the QF x PolkaVM front! 🚀 First, what is PolkaVM? It's a revolutionary RISC-V based virtual machine, able to that executes code at near-native speeds, while maintaining the security and portability needed for blockchain applications. PolkaVM is to QF what EVM is to Ethereum, with some added benefits Why we're bullish on PolkaVM: 🔥 Near-native execution speeds 🛠 Leverages mature RISC-V tooling ♻️ Seamless migration path for Solidity projects 🚀The world's fastest VM We've been deep in the trenches working with PolkaVM, amazing RISC-V-based smart contract execution environment (huge shoutout to Koute Parity Technologies for this groundbreaking tech!). While it's still marked as heavily under development, we're thrilled to share our progress! ✅ Configured and validated the patched LLVM toolchain (thanks to ParityTech for maintaining this crucial piece!) ✅ Got the RISC-V compilation pipeline up and running ✅ Deployed our first contracts ✅ Set up initial benchmarking framework The journey hasn't been without its challenges - the toolchain is complex and requires careful handling. Each system needs manual compilation and installation adjustments, but that's exactly the kind of technical puzzle we love solving! What's cooking next: 🔨 Launching a multi-node devnet with PolkaVM support 🔧 Running comprehensive benchmarks on our test WASM code compilation 🛠️ Experimenting with various smart contract compilation approaches 📊 Optimizing and streamlining the toolchain for broader developer accessibility The potential of RISC-V smart contracts is immense, and we're committed to pushing these capabilities forward together with the open source community. Share your thoughts on RISC-V smart contract development in the comments below. Major props to the ecosystem making this possible: -ParityTech and PolkaVM team for this innovative RISC-V approach -Substrate framework powering our core -Polkadot ecosystem for laying the groundwork -- 技術の山を登る時マシンは道具なり一の直感が道を照らす

QF Network

32,337 görüntüleme • 1 yıl önce

👀 Sneak peek at Tab5: 5" Smart Terminal with ESP32-P4 Tab5 packs the new ESP32-P4 RISC-V chip into a sleek, modular touchscreen device. Build for power, design to integrate. 🔥 📌 Available starting May 9 — stay tuned! #M5Stack #Tab5 #ESP32P4 #IoT #SmartTerminal

👀 Sneak peek at Tab5: 5" Smart Terminal with ESP32-P4 Tab5 packs the new ESP32-P4 RISC-V chip into a sleek, modular touchscreen device. Build for power, design to integrate. 🔥 📌 Available starting May 9 — stay tuned! #M5Stack #Tab5 #ESP32P4 #IoT #SmartTerminal

M5Stack

13,183 görüntüleme • 1 yıl önce

State of the new STABLE FUCKING RELEASE OF MacOS that my laptop is absolutely amazing ... maybe DHH has a point with all the Linux shit (in the background you can see my gaming computer that runs Linux and Windows just fine....)

State of the new STABLE FUCKING RELEASE OF MacOS that my laptop is absolutely amazing ... maybe DHH has a point with all the Linux shit (in the background you can see my gaming computer that runs Linux and Windows just fine....)

Fran Zekan

1,945,038 görüntüleme • 9 ay önce

I did an experiment with my Nokia N95. Using Python, I set up a local Linux server acting as a proxy between my phone and a smart vacuum cleaner. I also used the phone’s motion sensors to steer the vacuum like a handlebar #nokia #Python #linux

I did an experiment with my Nokia N95. Using Python, I set up a local Linux server acting as a proxy between my phone and a smart vacuum cleaner. I also used the phone’s motion sensors to steer the vacuum like a handlebar #nokia #Python #linux

Dante D. Leoncini

40,251 görüntüleme • 10 ay önce

“A cutting edge blueprint for the future of semiconductor chip design, called ‘RISC-V’… got it’s start right here on the campus of UC Berkeley. The same Berkeley professor who helped create the technology, is now partnering with Tsinghua University in China… The problem is that the TBSI partnership has a record of collaboration with Chinese military-linked universities. We must make sure that advanced technologies, such as RISC-V, developed through federal funding support are not being transferred to China by way of under-regulated collaborations between U.S. and Chinese universities at the cost of America’s national security.” - Chairman

“A cutting edge blueprint for the future of semiconductor chip design, called ‘RISC-V’… got it’s start right here on the campus of UC Berkeley. The same Berkeley professor who helped create the technology, is now partnering with Tsinghua University in China… The problem is that the TBSI partnership has a record of collaboration with Chinese military-linked universities. We must make sure that advanced technologies, such as RISC-V, developed through federal funding support are not being transferred to China by way of under-regulated collaborations between U.S. and Chinese universities at the cost of America’s national security.” - Chairman

Select Committee on China

40,187 görüntüleme • 2 yıl önce

Razer supports Linux now. They also don't ship the Blade 18 with 128gb. It's okay. I stockpiled some ram to upgrade it...and it worked! Thunderbolt5 is a nice bonus that also works on Linux... Review soon

Razer supports Linux now. They also don't ship the Blade 18 with 128gb. It's okay. I stockpiled some ram to upgrade it...and it worked! Thunderbolt5 is a nice bonus that also works on Linux... Review soon

wendell

30,331 görüntüleme • 2 ay önce

It's been a long time coming, but HERE IT IS My dice collaboration with the LOVELY Cassiopeia Guaranteed to bring more luck to your table 🎲 AND ENJOY THIS SILLY AD WE MADE v Link to Dice Below v

It's been a long time coming, but HERE IT IS My dice collaboration with the LOVELY Cassiopeia Guaranteed to bring more luck to your table 🎲 AND ENJOY THIS SILLY AD WE MADE v Link to Dice Below v

SummersSalt🧂ಥ_ಥ

51,115 görüntüleme • 11 ay önce

Dude, I haven’t touched my CPU since February. Getting back into it is crazy, but I just brought it back to life—synthesized and simulated. Can’t wait to hack on it again at the end of the month. It’s insanely fast and will be a Linux CPU. I’m super hyped. SystemVerilog forever.

Dude, I haven’t touched my CPU since February. Getting back into it is crazy, but I just brought it back to life—synthesized and simulated. Can’t wait to hack on it again at the end of the month. It’s insanely fast and will be a Linux CPU. I’m super hyped. SystemVerilog forever.

logic destroyer

50,026 görüntüleme • 7 ay önce